• Title/Summary/Keyword: Implementation Phase

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Adaptive Timing Synchronization Algorithm for WiBro Uplink (WiBro 상향링크를 위한 적응적 시간동기 추정 알고리즘)

  • Kim, Jeong-Been;Jin, Young-Hwan;Kim, Kyung-Soo;Ahn, Jae-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.11A
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    • pp.1068-1075
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    • 2006
  • An adaptive ranging technique for Orthogonal Frequency Division Multiple Access(OFDMA) uplink transmission is proposed for timing synchronization of multiple mobile stations located different distances from a base station. By combining the Timing Phase Compensated Frequency Domain Cross-correlation(TPCFDC) and Frequency Domain Differential Cross-correlation(FDDC), the proposed scheme reduces the number of correlators used in ordinary TPCFDC. Repeated initial ranging attempt with the FDDC in the proposed scheme greatly reduces the hardware implementation complexity. Simulation results for ranging success probability and average ranging attempts count show that the proposed algorithm performs similarly with the ordinary TPCFDC even with the 10 times reduced complexity.

A Digital Carrier Recovery Scheme for Satellite Transponder (디지털방식의 위성 트랜스폰더 반송파 복원 방안 연구)

  • Lee, Yoon-Jong;Choi, Seung-Woon;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.10A
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    • pp.807-813
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    • 2009
  • A Satellite transponder is the Communication system to process signal with up-link signal recovery, and transmit to ground station through down-link. The orbit flight in the deep space causes high doppler shift in the received signals from the ground station so that the Carrier recovery and fast synchronization system are essential for the transponder system. The conventional analog transponder is employing the system's carrier recovery along with the PLL (Phase Locked Loop) designed for satellite's operation. This paper presents a digital carrier recovery scheme which can provide more reliable and software reconfigurable implementation technique for satellite transponder system without verifying scheme along with transponder designed for short distance or deep space satellite.

Design of A Compact Single-Balanced Mixer for UWB Applications

  • Mohyuddin, Wahab;Kim, In Bok;Choi, Hyun Chul;Kim, Kang Wook
    • Journal of electromagnetic engineering and science
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    • v.17 no.2
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    • pp.65-70
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    • 2017
  • The design and implementation aspects of a new single-balanced mixer for ultra-wideband (UWB) applications are presented in this study. The proposed mixer utilizes a miniaturized UWB ring coupler as a balun, consisting of a pair of in-phase and inverted-phase transitional structures. The well-balanced UWB performance of the ring coupler, aside from the optimized diode matching, results in improved conversion loss and inter-port isolations for a wide bandwidth. The size of the implemented single-balanced diode mixer is reduced to about 60% of the area of the conventional single-balanced ring diode mixer. The measured results of the proposed mixer exhibit an average conversion loss of 7.5 dB (minimum 6.7 dB) and a port-to-port isolation of greater than 18 dB over a UWB frequency range of 3.1-10.6 GHz. The measured results agree well with the simulated results.

Implementation of Multilevel Boost DC-Link Cascade based Reversing Voltage Inverter for Low THD Operation

  • Rao, S. Nagaraja;Kumar, D.V. Ashok;Babu, Ch. Sai
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1528-1538
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    • 2018
  • In this paper, configuration of $1-{\phi}$ seven-level boost DC-link cascade based reversing voltage multilevel inverter (BDCLCRV MLI) is proposed for uninterrupted power supply (UPS) applications. It consists of three level boost converter, level generation unit and full bridge circuit for polarity generation. When compared with conventional boost cascaded H-bridge MLI configurations, the proposed system results in reduction of DC sources, reduced power switches and gate drive requirements. Inverter switching is accomplished by providing appropriate switching angles that is generated by any optimization switching angle techniques. Here, round modulation control (RMC) method is taken as the optimization method and switching angles are derived and the same is compared with various switching angles methods i.e., equal-phase (EP) method, and half-equal-phase (HEP) method which results in improved quality of obtained AC power with lowest total harmonic distortion (THD). Reduction in DC sources and switch count makes the system more cost effective. A simulation and prototype model of $1-{\phi}$ seven-level BDCLCRV MLI system is developed and its performance is analyzed for various operating conditions.

Carrier-based Modulation Method for Matrix Converter (캐리어를 이용한 매트릭스 컨버터의 전압 변조 방법)

  • Yoon Young-Doo;Sul Seung-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.6
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    • pp.543-549
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    • 2005
  • This paper presents a carrier-based modulation method for the control of a matrix converter. By using the offset voltage and changing the slope of the carrier, it is possible to synthesize sinusoidal input currents with unity power factor and the desired output voltages. The proposed method is equivalent to the so called SVPWM (Space Vector PWM) method, but its implementation is much easier. Moreover, the proposed method is very attractive because it is possible to apply the 2 phase t 3 phase modulation method, overmodulation method and other methods which are well-developed in the study of voltage source inverters (VSI) to the matrix coverter modulation. The feasibility of the proposed modulation method has been verified by computer simulation and experimental results.

A New Carrier Phase-Independent Discrete STR Algorithm for Sampled Receiver (샘플수신기를 위한 반송파위상에 독립적인 이산 STR 알고리듬)

  • 김의묵;조병록;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.4
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    • pp.561-571
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    • 1993
  • In this paper, a new discrete Symbol Timing Recovery (STR) algorithm, is proposed. This algorithm is derived from the optimum estimation theory. The algorithm combines the advantages of Mueller and $M\"{u}ller$ algorithm and Gardner algorithm, and avoids some of their shortcomings. The implementation of the new timing detector is simple and the combined operations of Carrier Recovery (CR) -STR is possible because the operation of the new STR is independent of the carrier phase. On the other hand, the behavior of nonlinear characteristics in the new algorithm is analyzed and explained. The performance evaluation is accomplished in detail by numerical calculations and Monte-Carlo simulations. In these respects, this algorithm is similar to Gardner's algorithm, but in tracking performance due to pattern jitter at small rolloff, the proposed algorithm is superior to Gardner's algorithm.

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Robust Deadbeat Current Control Method for Three-Phase Voltage-Source Active Power Filter

  • Nishida, Katsumi;Ahmed, Tarek;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.4 no.2
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    • pp.102-111
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    • 2004
  • This paper is concerned with a deadbeat current control implementation of shunt-type three-phase active power filter (APF). Although the one-dimensional deadbeat control method can attain time-optimal response of APF compensating current, one sampling period is actually required fur its settling time. This delay is a serious drawback for this control technique. To cancel such a delay and one more delay caused by DSP execution time, the desired APF compensating current has to be predicted two sampling periods ahead. Therefore an adaptive predictor is adopted for the purpose of both predicting the control error of two sampling periods ahead and bringing the robustness to the deadbeat current control system. By adding the adaptive predictor output as an adjustment term to the reference value of half a source voltage period before, settling time is made short in a transient state. On the other hand, in a steady state, THD (total harmonic distortion) of the utility grid side AC source current can be reduced as much as possible, compared to the case that ideal identification of controlled system could be made.

Real-Time Implementation of Shunt Active Filter P-Q Control Strategy for Mitigation of Harmonics with Different Fuzzy M.F.s

  • Mikkili, Suresh;Panda, Anup Kumar
    • Journal of Power Electronics
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    • v.12 no.5
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    • pp.821-829
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    • 2012
  • This research article presents a novel approach based on an instantaneous active and reactive power component (p-q) theory for generating reference currents for shunt active filter (SHAF). Three-phase reference current waveforms generated by proposed scheme are tracked by the three-phase voltage source converter in a hysteresis band control scheme. The performance of the SHAF using the p-q control strategy has been evaluated under various source conditions. The performance of the proposed control strategy has been evaluated in terms of harmonic mitigation and DC link voltage regulation. In order to maintain DC link voltage constant and to generate the compensating reference currents, we have developed Fuzzy logic controller with different (Trapezoidal, Triangular and Gaussian) fuzzy M.F.s. The proposed SHAF with different fuzzy M.F.s is able to eliminate the uncertainty in the system and SHAF gains outstanding compensation abilities. The detailed simulation results using MATLAB/SIMULINK software are presented to support the feasibility of proposed control strategy. To validate the proposed approach, the system is also implemented on a real time digital simulator and adequate results are reported for its verifications.

Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA

  • Halim, Wahidah Abd.;Rahim, Nasrudin Abd.;Azri, Maaspaliza
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.488-498
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    • 2014
  • This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

Generating Test Cases for Object-Oriented Design Specification (OCL로 기술된 객체지향 설계 명세의 테스트 케이스 생성)

  • Choe, Eun-Man
    • The KIPS Transactions:PartD
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    • v.8D no.6
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    • pp.843-852
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    • 2001
  • Statistics concerning software errors indicate that more errors are introduced in analysis and design phase than implementation phase. Therefore, it is needed to check whether the design modeling is appropriate for own function and structure. This paper discussed the effective test method for the object-oriented design model, i.e., UML. A new method was proposed for generating test data. This method consists of category partition theory by the representation each element in UML model with OCL (Object Constraint Language). Test data generated in this way can be used for testing the source code functionality as well as for checking the design model.

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