• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.7
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• pp.1777-1786
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• 1996

This paper describes theories and implementation techniques of a digital high-definition television(HDTV) modem based on 32-QAM for terrestrial broadcasting. We proposed a digital demodulation scheme and a symbol timing recovery structure based on the band edge component maximization(BECM) method. The adaptive equalizer has 256 complex taps to remove the multipath of delays ranging from -2.mu.s~+24.mu.s with a new T/2-spaced blind equalization algorithm. computer simulation results reveal that the proposed algorithm outperforms other conventional blind equalization algorithm a digital HDTV modem with 4.91MHz symobol rate is implemented by utilizing the proposed algorithms. All processings for modem operations such as demodulation, estimation of symbol timing phase error, adaptive equalization, and carrier recovery except IF signal processing and sampling phase control part of the AD converter are done in digital domain. Especially, the carrier recovery loop can track a carrier offset of upto .+-.350KHz.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.1143-1145
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• 2000

In this paper, it presents the design and implementation of a Microstep control IC using Programmable Logic Device(PLD). A Microstep driver is implemented with a 5-phase hybrid stepping motor, which has a Pentagon winding, power MOSFETs, and some devices to improve the system characteristics. The Microstep driving method is used for high performance motion control, low vibration and low noise in motor control system. The improvement of the electrical and mechanical driving characteristic of a step motor is achieved by applying microstep driver.

• ETRI Journal
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• v.30 no.4
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• pp.495-505
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• 2008

This paper presents a parallel processing searcher structure for the initial synchronization of a direct sequence ultra-wideband (DS-UWB) system, which is suitable for the digital implementation of baseband functionalities with a 1.32 Gsample/s chip rate analog-to-digital converter. An initial timing acquisition algorithm and a data demodulation method are also studied. The proposed searcher effectively acquires initial symbol and frame timing during the preamble transmission period. A hardware efficient receiver structure using 24 parallel digital correlators for binary phase-shift keying DS-UWB transmission is presented. The proposed correlator structure operating at 55 MHz is shared for correlation operations in a searcher, a channel estimator, and the demodulator of a RAKE receiver. We also present a pseudo-random noise sequence generated with a primitive polynomial, $1+x^2+x^5$, for packet detection, automatic gain control, and initial timing acquisition. Simulation results show that the performance of the proposed parallel processing searcher employing the presented pseudo-random noise sequence outperforms that employing a preamble sequence in the IEEE 802.15.3a DS-UWB proposal.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.5
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• pp.98-104
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• 2009

In this paper, improved VCO(voltage controlled oscillator) with push-push structure and high impedance-inverter is designed and implemented. Two harmonic oscillators are combined into push-push structure. As a result, the fundamental suppression and the output power have been progressed. For the improved coupling characteristics between hair-pin resonator and two parallel microstrip line using high impedance inverter, the phase noise has been suppressed.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.34 no.4
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• pp.138-144
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• 2011

The design flexibility and robustness have become key factors to handle various sources of uncertainties at the early phase of design. Even though designers are uncertain about which single values to specify, they usually have a preference for certain values over others. In the first and second reports of a four-part paper, a set-based design approach has been proposed for achieving design flexibility and robustness while capturing designer's preference, and its effectiveness has been illustrated with a simple vehicle side-door impact beam design problem. This report presents the applicability of the proposed design approach to the large-scale multi-objective design optimization with a successful implementation of real vehicle side-door structure design.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.79-88
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• 1997

This paper introduces a new energy function, as maximum a posteriori(MAP) estimate of binocular disparity, that can deal with both random dot stereo-gram(RDS) and natural scenes. The energy function uses phase-magnitude as features to detect only the shift for a pair of corrupted conjugate images. Also we adopted Fleet singularity that effectively detects unstable areas of image plant and thus eliminates in advance error-prone stereo mathcing. The multi-scale concept is applied to the multi laser architecture that can search the solutions systematically from coarse to fine details and thereby avoids drastically the local minima. Using mean field approximation, we obtained a compact representation that is suitable for fast computation. In this manner, the energy function satisfies major natural constraints and requirements for implementing parallel relaxation. As an experiment, the proposed algorithm is applied to RDS and natural stereo images. As a result we will see that it reveals good performance in terms of recognition errors, parallel implementation, and noise characteristics.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.313-317
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• 2004

This paper shows the structure of a control System for Fluorescent fin Dimming Ballasts. The control system is composed of phase angle controller, a transducer, many dimmable ballasts. For the implementation of the control system, We made a controller and the transducer that transform the phase angle controlled signal into the DC level. we used the conventional dimmable ballast In this ballast, dimming control is achieved by varying the switching frequency that is controlled by the external DC level. This has non-linear illumination characteristics as the dimming control. Therefore we compensate characteristics using the transducer proposed in this paper. We measured the illumination of two FL-28 lamps with dimming controller.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.389-391
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• 2011

This paper has been studied about design of linear 25Watt Power amplifier for VDR(VHF Data Radio). VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. It also stated in DO-281A MOPS output power, symbol constellation error, spurious emissions, adjacent channel power must be met. HPA is designed to meet DO-281A standard.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.135-137
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• 2007

A phase shifted full-bridge PWM converter (PSFBC) has been used as the most popular topology for many applications. But, for the reasons of the cost and performance, the control circuits for the PSFBC have generally been implemented using analog circuits. The studies on the digital control of the PSFBC were recently presented. However, they considered only the digital implementation of the analog controller. This paper presents the modeling and design of the digital controller for the PSFBC in the discrete time domain. The discretized PSFBC model is first derived considering the sampling effect. Based on this model, the digital controller is directly designed in discrete time domain. The simulation and experimental results are provided to verify the proposed modeling and controller design.

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1052-1059
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• 2018

This paper deals with commutation failure of the line-commutated converter high voltage direct current (LCC HVDC) system caused by a three phase fault in the ac power system. An analytic calculation method is proposed to estimate the maximum permissible voltage drop at the LCC HVDC station on various operating point and to assess the area of vulnerability for commutation failure (AOV-CF) in the power system based on the residual phase voltage equation. The concept is extended to multi-infeed HVDC power system as the area of severity for simultaneous commutation failure (AOS-CF). In addition, this paper presents the implementation of a shunt compensator applying to the proposed method. An analysis and simulation have been performed with the IEEE 57 bus sample power system and the Jeju island power system in Korea.