• Title/Summary/Keyword: Image sensors compatibility

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Proposed Schemes for Image Sensors Compatibility in IEEE TG7r1 Image Sensor Communications

  • Nguyen, Trang;Hong, Chang Hyun;Jang, Yeong Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.7
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    • pp.799-808
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    • 2016
  • The IEEE 802.15.7r1 Task Group (TG7r1), known as the revision of the IEEE 802.15.7 Visible Light Communication standard targeting the commercial usage of visible light communication systems which mainly use either image sensors or cameras, is of interest in this paper. The vast challenge in Image Sensor Communications (ISC), as it has been addressed in the Technical Consideration Document (TCD) of the TG7r1, is the Image Sensor Compatibility to support the variety of different commercial cameras available on the market. The on-going ISC standard must adhere to compatible image sensors regulations. This paper brings an inside review of the TG7r1 and an inside look of related works on Image Sensor Communications. The paper analyzes the compatibility features by introducing a revised model of receiver to explain how those features are necessary. One of the most challenging but interesting features is the capability in being compatible to camera frame rates. The variation of camera frame rate is modeled from verified experimental results. Noticeably, three singular approaches to support frame rates compatibility, including temporal approach, spatial approach, and frequency-domain approach, are proposed on the paper along with concise definitions. Those schemes have been presented as valuable proposals on the call-for-proposal meeting series of the TG7r1 recently.

A highly integrable p-GaN MSM photodetector with GaN n-channel MISFET for UV image sensor system

  • Lee, Heon-Bok;Hahm, Sung-Ho
    • Journal of Sensor Science and Technology
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    • v.17 no.5
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    • pp.346-349
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    • 2008
  • A metal-semiconductor-metal (MSM) ultraviolet (UV) photodetector (PD) is proposed as an effective UV sensing device for integration with a GaN n-channel MISFET on auto-doped p-type GaN grown on a silicon substrate. Due to the high hole barrier of the metal-p-GaN contact, the dark current density of the fabricated MSM PD was less than $3\;nA/cm^2$ at a bias of up to 5 V. Meanwhile, the UV/visible rejection ratio was 400 and the cutoff wavelength of the spectral responsivity was 365 nm. However, the UV/visible ratio was limited by the sub-bandgap response, which was attributed to defectrelated deep traps in the p-GaN layer of the MSM PD. In conclusion, an MSM PD has a high process compatibility with the n-channel GaN Schottky barrier MISFET fabrication process and epitaxy on a silicon substrate.

Flicker-Free Spatial-PSK Modulation for Vehicular Image-Sensor Systems Based on Neural Networks (신경망 기반 차량 이미지센서 시스템을 위한 플리커 프리 공간-PSK 변조 기법)

  • Nguyen, Trang;Hong, Chang Hyun;Islam, Amirul;Le, Nam Tuan;Jang, Yeong Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.8
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    • pp.843-850
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    • 2016
  • This paper introduces a novel modulation scheme for vehicular communication in taking advantage of existing LED lights available on a car. Our proposed 2-Phase Shift Keying (2-PSK) is a spatial modulation approach in which a pair of LED light sources in a car (either rear LEDs or front LEDs) is used as a transmitter. A typical camera (i.e. low frame rate at no greater than 30fps) that either a global shutter camera or a rolling shutter camera can be used as a receiver. The modulation scheme is a part of our Image Sensor Communication proposal submitted to IEEE 802.15.7r1 (TG7r1) recently. Also, a neural network approach is applied to improve the performance of LEDs detection and decoding under the noisy situation. Later, some analysis and experiment results are presented to indicate the performance of our system

Wafer-Level Three-Dimensional Monolithic Integration for Intelligent Wireless Terminals

  • Gutmann, R.J.;Zeng, A.Y.;Devarajan, S.;Lu, J.Q.;Rose, K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.4 no.3
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    • pp.196-203
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    • 2004
  • A three-dimensional (3D) IC technology platform is presented for high-performance, low-cost heterogeneous integration of silicon ICs. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. Daisy-chain inter-wafer via test structures and compatibility of the process steps with 130 nm CMOS sal devices and circuits indicate the viability of the process flow. Such 3D integration with through-die vias enables high functionality in intelligent wireless terminals, as vertical integration of processor, large memory, image sensors and RF/microwave transceivers can be achieved with silicon-based ICs (Si CMOS and/or SiGe BiCMOS). Two examples of such capability are highlighted: memory-intensive Si CMOS digital processors with large L2 caches and SiGe BiCMOS pipelined A/D converters. A comparison of wafer-level 3D integration 'lith system-on-a-chip (SoC) and system-in-a-package (SiP) implementations is presented.