• Title/Summary/Keyword: Image Processor

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The Implementation of a Pipe-lined Grid Coverage and Grid Coverage Processor

  • Kim, Hong-Gab;Kim, Kyung-Ok
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.70-73
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    • 2002
  • This paper describes the way to embody the grid coverage and the grid coverage processor which can construct pipelines. The pipeline constructed by the developed grid coverages has internal pipelines that have different resolution and it provides the way of access to very large datasets efficiently. Several operations, such as filtering, image enhancement and band operation, are embedded in the developed grid coverage and grid coverage processor COM components. The practical usefulness of the developed grid coverage and grid coverage processor has been proven by applying them in developing an image processing software for very large images.

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An Efficient 2-dimensional Addressing Mode for Image Processor (영상처리용 프로세서를 위한 효율적인 이차원 어드레스 지정 기법)

  • Go, Yun-Ho;Yun, Byeong-Ju;Kim, Seong-Dae
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.5
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    • pp.486-497
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    • 2001
  • In this paper, we propose a new addressing mode, which can be used for programmable image processor to perform image-processing algorithms effectively. Conventional addressing modes are suitable for one-dimensional data processing such as voice, but the proposed addressing mode consider two-dimensional characteristics of image data. The proposed instruction for two-dimensional addressing requires two operands to specify a pixel and doesn't require any change of memory architecture. The proposed two-dimensional addressing mode for image processor has the following advantages. The proposed instruction combines several instructions to load a pixel data from an external memory to a register. Hence, the proposed instruction reduces required code size so that it satisfies high performance and low power requirements of image processor. In addition, it uses inherent two-dimensional characteristics of image data and offers user-friendly instruction to assembler programmer The proposed two-dimensional addressing mode is applicable to DSP, media processor, graphic device, and so on. In this paper, we propose a new concept of two-dimensional addressing mode and an efficient hardware implementation method of it.

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Quality Analysis of SAR Image

  • Lee, Young-Ran;Kwak, Sung-Hee;Shin, Dong-Seok;Park, Won-Kyu
    • Proceedings of the KSRS Conference
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    • 2003.11a
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    • pp.628-630
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    • 2003
  • Synthetic Aperture Radar(SAR) is an active microwave instrument that performs high-resolution observation under almost all weather condition. Research and algorithms have been proposed to process radar signal and to increase the quality of SAR products. In fact, many complicated steps are involved in order to generate a SAR image product. The purpose of this paper is to derive quality assessment procedures and define important test parameters in each procedure inside a SAR processor. Thus those test parameter values indicate the quality of SAR image products and verify the processor's performance. Moreover, required procedures to correct and handle errors which are indicated during the assessment are also presented.

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Implementation of SIMD-based Many-Core Processor for Efficient Image Data Processing (효율적인 영상데이터 처리를 위한 SIMD기반 매니코어 프로세서 구현)

  • Choi, Byong-Kook;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.1
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    • pp.1-9
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    • 2011
  • Recently, as mobile multimedia devices are used more and more, the needs for high-performance and low-energy multimedia processors are increasing. Application-specific integrated circuits (ASIC) can meet the needed high performance for mobile multimedia, but they provide limited, if any, generality needed for various application requirements. DSP based systems can used for various types of applications due to their generality, but they require higher cost and energy consumption as well as less performance than ASICs. To solve this problem, this paper proposes a single instruction multiple data (SIMD) based many-core processor which supports high-performance and low-power image data processing while keeping generality. The proposed SIMD based many-core processor composed of 16 processing elements (PEs) exploits large data parallelism inherent in image data processing. Experimental results indicate that the proposed SIMD-based many-core processor higher performance (22 times better), energy efficiency (7 times better), and area efficiency (3 times better) than conversional commercial high-performance processors.

Development of Thermal Image System Based Multi-Core Image Processor (멀티코어 이미지 프로세서 기반 열화상 이미지 시스템 개발)

  • Cha, Jeong Woo;Han, Joon Hwan;Park, Chan;Kim, Young Jin
    • KIPS Transactions on Computer and Communication Systems
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    • v.9 no.2
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    • pp.25-30
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    • 2020
  • The thermal image system was widely used in the defence-related industry because of detect infrared light from the object without light. but, as the demand in the security system and automobile market increases, the civilian industry are expanding to the private sector. There are difficult to apply various requirement because of previous systems are based by FPGA, so it need new system that apply to various requirement. The proposed paper is thermal image processing system using common image processor. It has various requirement and scalable to support image input/output interface and device driver. If it is used to proposed system, it reduce development cost and period than previous system based FPGA. Because there has very high accessibility. In addition, it expect to have satisfaction of customer requirements, development cost, development period, release date of product.

Development of Thermal Image Processing Module Using Common Image Processor (상용 이미지 처리 프로세서를 이용한 열화상 이미지 처리 모듈 개발)

  • Han, Joon Hwan;Cha, Jeong Woo;Kim, Bo Mee;Lim, Jae Sung
    • KIPS Transactions on Computer and Communication Systems
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    • v.9 no.1
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    • pp.1-8
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    • 2020
  • The thermal image device support image to detect infrared light from the object without light. It can use not only defence-related industry, but also civilian industry. This paper presents a new thermal image processing module using common image processor. The proposed module shows 10~20% performance improvement with normal mode and 50% performance improvement with sleep mode compared with the previously thermal image module based FPGA. and it guarantees high scalability according to modular system. In addition, the proposed module improves modulation and reuse, so it expect to have reduction of development period, low development cost. various application. In addition, it expect to have satisfaction of customer requirements, development design, development period, release date of product.

An Image Signal Processor for Ultra Small HDGrade Video Sensor with 3A in Camera Phones

  • Jang, Won-Woo;Kim, Joo-Hyun;Han, Hag-Yong;Yang, Hoon-Gee;Kang, Bong-Soon
    • Journal of information and communication convergence engineering
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    • v.7 no.4
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    • pp.507-515
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    • 2009
  • In this paper, we propose an image signal processor (ISP) for an ultra small HD-grade video sensor with 3A (AWB, AE, and AF) in camera phones that can process 720P/30fps videos. In order to enhance the video quality of the systems, it is necessary to achieve the high performance of the 3A. The proposed AWB algorithm multiplies the adjusted coefficients of color gains to the captured data of white objects. The proposed AE method adopts the index step moving based on the difference between an averaged Y luminance and a target luminance, together with IIR filters with variable time responses. The proposed AF technique controls the focus curve to find the lens position that maximizes the integrated high frequency components in luminance values by using highpass filters. Finally, we compare the image quality captured from our system to the quality of a commercial HD camcorder in order to evaluate the performance of the proposed ISP. The proposed ISP system is also fabricated with 0.18um CMOS flash memory process.

Realization for Image Distortion Correction Processing System with Fisheye Lens Camera

  • Kim, Ja-Hwan;Ryu, Kwang-Ryol;Sclabassi, Robert J.
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.281-284
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    • 2007
  • A realization for image distortion correction processing system with DSP processor is presented in this paper. The image distortion correcting algorithm is realized by DSP processor for focusing on more real time processing than image quality. The lens and camera distortion coefficients are processed by YCbCr Lookup Tables and the correcting algorithm is applied to reverse mapping method for geometrical transform. The system experimentation results in the processing time about 34.6 msec on $720{\times}480$ curved image at 150 degree visual range.

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A Proposal for Processor for Improved Utilization of High resolution Satellite Images

  • Choi, Kyeong-Hwan;Kim, Sung-Jae;Jo, Yun-Won;Jo, Myung-Hee
    • Proceedings of the KSRS Conference
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    • 2007.10a
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    • pp.211-214
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    • 2007
  • With the recent development of spatial information technology, the relative importance of satellite image contents has increased to about 62%, the techniques related to satellite images have improved, and their demand is gradually increasing. Accordingly, a standard processing method for the whole process of collection from satellites to distribution of satellite images is required in many countries for efficient distribution of images and improvement of their utilization. This study presents the processor standardization technique for the preprocessing of satellite images including geometric correction, orthorectification, color adjustment, interpolation for DEM (Digital Elevation Model) production, rearrangement, and image data management, which will standardize the subjective, complex process and improve their utilization by making it easy for general users to use them

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The Image Transmisson System Design using DSP and Wavelet (DSP와 웨이블릿을 이용한 영상 전송 시스템의 설계에 관한 연구)

  • 이명철;류광렬
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.205-208
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    • 2002
  • The stand-alone transmission system design on compressed still image using DSP processor and Wavelet is presented. The target system is based on 32bits DSP processor. The image is compressed with Wavelet. The system for NTSC format image signal is able to transmit still image data to be high speed and is applicable to a surveillance and inspection system independently.

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