• Title/Summary/Keyword: Image Processor

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A study of Implementation of Motion Estimation with ADSP-21020 (ADSP-21020을 이용한 Motion Estimation의 구현에 관한 연구)

  • Kim, Sang-Ki;Kim, Jae-Young;Byun, Chae-Ung;Chung, Chin-Hyun
    • Proceedings of the KIEE Conference
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    • 1996.07b
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    • pp.1380-1382
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    • 1996
  • In this paper, a motion estimation module is made with ADSP-21020 based on MPEG-2 which is an international standard for moving picture compression. And, the block matching algorithm used as motion estimation method is easy for an hardware implementation. The ADSP-21020 of Analog Device is used for a main control processor. We used three block matching method (exhaustive search method, 2D-logarithmic search method, three step search method) for software simulation and implemented the three step search method to hardware. For the test of the estimation module, we used ping pong image sequences and mobile and calendar image sequences.

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Implementation of Web-Based Remote Control System Using Embedded Linux (내장형 리눅스를 이용한 웹 기반 원격 제어 시스템 구현)

  • Lee, Seok-Won;Lee, Jin-Woo
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2609-2611
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    • 2003
  • In this study, we explain the process and the technique required for implementing web-based remote control system based on embedded processor, SAl110, and embedded Linux. At first. cross-compile environment for target system should be constructed on host computer, and bootloader in charge of Linux booting may be loaded on the target system. Then, kernel image is compiled and loaded on the target system. Embedded Linux porting process is completed when ram disk image is generated. Finally, we load wed-server and device driver on the ram disk and make web-page for remote control using CGI. Through the above process, we implement web-based remote control system and present the result.

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System Implementation for PC-based Center Position Control of Strip (PC 기반 Strip 중앙 위치 제어 시스템의 구현)

  • Park, Nam-Jun;Jung, Jin-Yang;Kim, Hyun-Sool;Han, Young-Oh;Park, Sang-Hui
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.395-397
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    • 1996
  • The existing CPC(Center Position Controller) has unstably performed because of dusts on reflection panel, CCD protector contamination due to high temperature in furnace or other parameters. The reason is that the existing CPC has a Z80 processor as a CPU and only performs low level image processing as a simple edge detector. So the improvement of control system through the development of robust edge detection algorithm overcoming changes of measuring environment is needed. For this, in this study we carefully analyze the image of the strip rolled in occasion that measuring environment is changing, develop the optimal edge detection algorithm to solve the problems, generate the control signal suitable for the existing CPC(Center Position Controller), and propose the capability of application to the actual environment.

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Parallel Processing of Pattern Recognition Algorithms for an Automatic Assembly System of Electronic Components (전자부품 조립공정의 자동화를 위한 형상인식 알고리즘의 병렬처리)

  • You, B.J.;Oh, Y.S.;Oh, S.R.;Bien, Z.
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.260-264
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    • 1987
  • Algorithms to detect in real-time both position and orientation of rectangular type electronic components are developed for industrial vision. In order to conduct detection in real-time, parallel processing algorithm of image date which uses several control processor is proposed. Image processing area is divided into several regions which can be processed by each cpu. As a result, processing time is improved when two control processors are used and real-time pattern recognition of not-well-aligned components is accomplished.

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Digital Image Processing for Dynamic Color Images of Laryngeal Lesions Obtained With Electronic Videoendoscopy

  • Kawaida, Masahiro
    • Proceedings of the KSLP Conference
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    • 1998.11a
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    • pp.192-193
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    • 1998
  • Introduction : Laryngeal lesions were observed using the OLYMPUS EVIS-200 electronic videoendoscope system attached to the OLYMPUS ENF-200 rhinolarynx endoscope portion. This endoscope portion can be introduced into the laryngeal cavity by inserting it through the nasal passages. Since it is also possible to connect the OLYMPUS EVIP-230 digital image processor capable of processing dynamic images in real time to this system, an attempt has also been made to process the dynamic color images of laryngeal lesions obtained with the electronic videoendoscope system. Structure enhancement and color enhancement were peformed as processing images. The images of laryngeal lesions obtained with this system and the processed images are presented and described from the standpoint of diagnostic usefulness (omitted)

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The Design of DWT Processor for RealTime Image Compression (실시간 영상압축을 위한 DWT 프로세서 설계)

  • Gu, Dae Seong;Kim, Jong Bin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.5C
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    • pp.654-654
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    • 2004
  • 본 논문에서는 이산웨이블렛 변환을 이용한 영상 압축 프로세서를 하드웨어로 구현하였다. 웨이블렛 변환을 위하여 필터뱅크 및 피라미드 알고리즘을 이용하였고 각 필터들은 FIR 필터로 구현하였다. 병렬구조로 이루어져 동일 클럭 싸이클에서 하이패스와 로패스를 동시에 수행함으로써 속도를 향상시킬 뿐 아니라 QMF 특성을 이용하여 DWT 연산에 필요한 승산기의 수를 절반으로 줄임으로써 하드웨어 크기를 줄이고 이용효율 또한 높일 수 있다. 다중 해상도 분해 시 필요한 메모리 컨트롤러를 하드웨어로 구현하여 DWT 계산이 수행되므로 이 융자는 단순한 파라메터 입력만으로 효과적인 압축율을 얻을 수 있도록 구조적으로 설계하였다. 실시간 영상압축 프로세서의 성능 예측을 위하여 MATLAB을 통하여 시뮬레이션 하였고, VHDL을 이용하여 각 모듈들을 설계하였다. 설계한 영상압축기는 Leonaro-Spectrum에서 합성하였고, ALTERA FLEX10KE(EPF10K100 EFC256) FPGA에 이식하여 하드웨어적으로 동작을 검증하였다. 설계된 부호화기는 512×512 Woman 영상에 대하여 33㏈의 PSNR값을 갖는다. 그리고 설계된 프로세서를 FPGA 구현 시 35㎒에서 정상적으로 동작한다.

A Study on the Development of Zigbee Wireless Image Transmission and Monitoring System (지그비 무선 이미지 전송 및 모니터링 시스템 개발에 대한 연구)

  • Roh, Jae-sung;Kim, Sang-il;Oh, Kyu-tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.631-634
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    • 2009
  • Recent advances in wireless communication, electronics, MEMS device, sensor and battery technology have made it possible to manufacture low-cost, low-power, multi-function tiny sensor nodes. A large number of tiny sensor nodes form sensor network through wireless communication. Sensor networks represent a significant improvement over traditional sensors, research on Zigbee wireless image transmission has been a topic in industrial and scientific fields. In this paper, we design a Zigbee wireless image sensor node and multimedia monitoring server system. It consists of embedded processor, memory, CMOS image sensor, image acquisition and processing unit, Zigbee RF module, power supply unit and remote monitoring server system. In the future, we will further improve our Zigbee wireless image sensor node and monitoring server system. Besides, energy-efficient Zigbee wireless image transmission protocol and interworking with mobile network will be our work focus.

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Feature Extraction System for High-Speed Fingerprint Recognition using the Multi-Access Memory System (다중 접근 메모리 시스템을 이용한 고속 지문인식 특징추출 시스템)

  • Park, Jong Seon;Kim, Jea Hee;Ko, Kyung-Sik;Park, Jong Won
    • Journal of Korea Multimedia Society
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    • v.16 no.8
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    • pp.914-926
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    • 2013
  • Among the recent security systems, security system with fingerprint recognition gets many people's interests through the strengths such as exclusiveness, convenience, etc, in comparison with other security systems. The most important matters for fingerprint recognition system are reliability of matching between the fingerprint in database and user's fingerprint and rapid process of image processing algorithms used for fingerprint recognition. The existing fingerprint recognition system reduces the processing time by removing some processes in the feature extraction algorithms but has weakness of a reliability. This paper realizes the fingerprint recognition algorithm using MAMS(Multi-Access Memory System) for both the rapid processing time and the reliability in feature extraction and matching accuracy. Reliability of this process is verified by the correlation between serial processor's results and MAMS-PP64's results. The performance of the method using MAMS-PP64 is 1.56 times faster than compared serial processor.

An Efficient H.264/AVC Entropy Decoder Design (효율적인 H.264/AVC 엔트로피 복호기 설계)

  • Moon, Jeon-Hak;Lee, Seong-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.12
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    • pp.102-107
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    • 2007
  • This paper proposes a H.264/AVC entropy decoder without embedded processor nor memory fabrication process. Many researches on H.264/AVC entropy decoders require ROM or RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, many researches require embedded processors for bitstream manipulation, which increases area and power consumption. This papers proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, its CAVLC decoder optimizes lookup table and internal buffer without embedded memory, which reduces hardware size and can be implemented in general digital logic fabrication process without ROM or RAM fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. Synthesized in TSMC 90nm fabrication process, its maximum operation frequency is 125MHz. It supports QCIF, CIF, and QVGA image format. Under slight modification of nC register and other blocks, it also support VGA image format.

An Efficient On-line Frame Scheduling Algorithm for Video Conferences (화상회의를 위한 효율적인 온-라인 프레임 스케줄링 알고리즘)

  • 안성용;이정아;심재홍
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.7
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    • pp.387-396
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    • 2004
  • In this paper, we propose an algorithm that distributes processor time to the tasks decoding encoded frames with a goal maximizing total QoS (quality of services) of video conference system. An encoded frame has such a characteristic that the QoS of recovered frame image also increases as the processor time given for decoding the frame gets to increase. Thus, the quality of decoded image for each frame can be represented as a QoS function of the amount of service time given to decode. In addition, every stream of video conference has close time-dependency between continuous frames belonging to the same stream. Based on the time-dependency and QoS functions, we propose an on-line frame scheduling algorithm which does not schedule all frames in the system but just a few frames while maximizing total QoS of video streams in the conference. The simulation results show that, as the system load gets to increase, the proposed algorithm compared to the existing EDF algorithm can reduce the quality of decoded frame images more smoothly and show the movements of conference attendees more naturally without short cutting.