• Title/Summary/Keyword: INPUT IMPEDANCE

Search Result 652, Processing Time 0.024 seconds

A Study on Over Current Protection Method of Unified Power Quality Conditioners (통합 전력품질 제어기의 과전류 보호방법에 관한 연구)

  • 이우철;김한정
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.16 no.5
    • /
    • pp.22-28
    • /
    • 2002
  • A protection scheme for Unified Power Quality Conditioner (UPQC) is presented and analyzed in this paper. The proposed UPQC has the series active power filter operated as a high impedance k($\Omega$) to the fundamentals when the over current occurs in the power distribution system, and three control strategies are proposed in this paper. The first is the method by detecting the fundamental source current through the p-q theory,[1] the second is the method by detecting the fundamental component of load current in Synchronous Reference Frame(SRF) and the third is the method by detecting the input voltage. When the over current occurs in the power distribution system, the proposed scheme protects the UPQC without additional protection circuits. The validity of proposed protection scheme is investigated through simulation results.

A Study on Dual Circular Polarized Patch Antenna with Compact Size (소형 이중 원형편파 패치안테나에 관한 연구)

  • Yun, Gi-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.7
    • /
    • pp.1537-1543
    • /
    • 2010
  • This paper describes a compact microstrip antenna with dual polarization characteristics. The antenna, receiving both a left-hand circularly polarized(LHCP) wave and a right-hand circularly polarized(RHCP) wave, can be used for a polarization diversity. A diamond-shaped patch with internal empty room is designed for impedance matching as well as size reduction. And slots are added around feeding point to improve input matching. The proposed antenna has been applied to GPS(global positioning system), operating at 1.57GHz. And, the proposed idea has been verified and estimated by simulation. The measurement results show that it has VSWR 2:1 bandwidth of 83MHz, 3dB axial bandwidth of about 58MHz, 3dB beamwidth of 90degree, and gain of 0dBi, respectively, for RHCP. Also, it has similar performances for LHCP.

Disk Sector Antenna fed by CPW for UWB Communications (UWB 통신용 CPW 급전 디스크 섹터 안테나)

  • Lim, Jung-Hyun;Lee, Min-Soo;Yang, Doo-Yeong
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.10 no.2
    • /
    • pp.303-312
    • /
    • 2009
  • In this paper, we design and fabricate a disk sector antenna fed by CPW fur UWB communications. Also, we insert a rectangular slit on the arc-edge of the disk sector antenna. Then, the antenna has the directivity of E-면. In order to design the antenna, the input impedance is matched with the feed line of $50{\Omega}$ as varying the physical antenna parameters, which are the radius, the flare angle of disk sector, the length of ground, and the length of ground comer near by feed tine. Dimension of the antenna designed for UWB communication is $72mm{\times}26mm$ and bandwidth through computer simulation is $3{\sim}13GHz$. From the measured results, the bandwidth is $1.98{\sim}11GHz$. Return loss and gain of the fabricated antenna are -50.38dB, 1.34dBi at 3.5GHz, -12.27dB, 3.35dBi at 5.5GHz, -23.2dB, 3.8dBi at 8GHz and -16.17dB, 5.2dBi at 10GHz, respectively.

DC-Link Voltage Unbalancing Compensation of Four-Switch Inverter for Three-Phase BLDC Motor Drive (3상 BLDC 전동기 구동을 위한 4-스위치 인버터의 DC-Link 전압 불평형 보상)

  • Park, Sang-Hoon;Yoon, Yong-Ho;Lee, Byoung-Kuk;Lee, Su-Won;Won, Chung-Yuen
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.58 no.4
    • /
    • pp.391-396
    • /
    • 2009
  • In this paper, a control algorithm for DC-Link voltage unbalancing compensation of a four-switch inverter for a three-phase BLDC motor drive is proposed. Compared with a conventional six-switch inverter, the split source of the four-switch inverter can be obtained by splitting DC-link capacitor into two capacitors to drive the three phase BLDC motor. The voltages across each of two capacitors are not always equal in steady state because of the unbalance in the impedance of the DC-link capacitors $C_1$ and $C_2$ or the variable current flowed into the capacitor's neutral point in motor control. Despite the unbalance, if the BLDC motor may be run for a long time the voltage across one of the capacitors is more increased. So the unbalance in the capacitors voltages will be accelerated. As a result, The current ripple and torque ripple is increased due to the fluctuation of input current which flows into 3-phase BLDC motor. According to that, the vibration of motor will be increased and the whole system will be instable. This paper presents a control algorithm for DC-Link voltage unbalancing compensation. The sampling from the voltages across each of two capacitors is used to perform the voltage control of DC-Link by using the feedforward controller.

Digital Control for BUCK-BOOST Type Solar Array Regulator (벅-부스트 형 태양전력 조절기의 디지털 제어)

  • Yang, JeongHwan;Yun, SeokTeak;Park, SeongWoo
    • Journal of Satellite, Information and Communications
    • /
    • v.7 no.3
    • /
    • pp.135-139
    • /
    • 2012
  • A digital controller can simply realize a complex operation algorithm and power control process which can not be applied by an analog circuit for a solar array regulator(SAR). The digital resistive control(DRC) makes an equivalent input impedance of the SAR be resistive characteristic. The resistance of the solar array varies largely in a voltage source region and slightly in a current source region. Therefore when the solar array regulator is controlled by the DRC, the Advanced Incremental Conductance MPPT Algorithm with a Variable Step Size(AIC-MPPT-VSS) is suitable. The AIC-MPPT-VSS, however, using small signal resistance and large signal resistance of the solar array can not limit the absolute value of the solar array power. In this paper, the solar array power limiter is suggested and the BUCK-BOOST type SAR which is fully controlled by the digital controller is verified by simulation.

The New Type Pulse Generator Adopted Cascading Technique (소형트랜스의 Cascading 방식을 적용한 임펄스 출력특성)

  • Kyung-Ae Shin;Whi-Young kim;Myeong-Soon Kim
    • Journal of the Korea Computer Industry Society
    • /
    • v.2 no.3
    • /
    • pp.363-368
    • /
    • 2001
  • This paper introduced cascading technique as a new technology composed of two pulse transformers and presented the experimental data and results. To obtain the stable pulse voltage adopted cascading technique, we designed and tested a compact pulse generator by adjusting the load resistors and input voltage. Adopting cascading technique to load, we found that average cascading voltage was about 62$\%$ of theoretical value. Cascading ratio was calculated at almost 19 compared with non cascading voltage.

  • PDF

Triplexer based on Filter Characteristics of CRLH Transmission Line and Triple-Band Amplifier Applications (CRLH 전송선로의 필터 특성을 이용한 트리플렉서와 삼중대역 증폭기에의 응용)

  • Yun, Jeong-Ho;Kim, Young;Yoon, Young-Chul
    • Journal of Advanced Navigation Technology
    • /
    • v.16 no.3
    • /
    • pp.433-439
    • /
    • 2012
  • In this paper, we proposed the triplexer using unit-cell of CRLH transmission line which has a bandpass characteristic to reduce adjacent channel interference. The input impedance of triplexer with each channel filter is operated open-circuit at the resonance frequencies of other channels. Such property is due to the combination a series and parallel resonance circuits of CRLH-TL unit-cell. The measured triplexer results are showed a measured insertion loss of each channel, less than 1.5 dB, matching at each port, less than 15dB and isolation between channel, better than 25 dB. Also, to validate the triplexer, a small signal amplifier with triple-band is designed and tested. the measured amplifier results show good agreements with prediction.

Switch-Level Binary Decision Diagram(SLBDD) for Circuit Design Verification) (회로 설계 검증을 위한 스위치-레벨 이진 결정 다이어그램)

  • 김경기;이동은;김주호
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.5
    • /
    • pp.1-12
    • /
    • 1999
  • A new algorithm of constructing binary decision diagram(BDD) for design verification of switch-level circuits is proposed in this paper. In the switch-level circuit, functions are characterized by serial and parallel connections of switches and the final logic values may have high-impedance and unstable states in addition to the logic values of 0 and 1. We extend the BDD to represent functions of switch-level circuits as acyclic graphs so called switch-level binary decision diagram (SLBDD). The function representation of the graph is in the worst case, exponential to the number of inputs. Thus, the ordering of decision variables plays a major role in graph sizes. Under the existence of pass-transistors and domino-logic of precharging circuitry, we also propose an input ordering algorithm for the efficiency in graph sizes. We conducted several experiments on various benchmark circuits and the results show that our algorithm is efficient enough to apply to functional simulation, power estimation, and fault-simulation of switch-level design.

  • PDF

A Study on Coupling Coefficient and Resonant Frequency Controllable Internal PIFA (결합계수 및 공진 주파수 조절이 가능한 내장형 PIFA에 관한 연구)

  • Lee, Sang-Hyun;Lee, Moon-Woo
    • Journal of the Korea Society of Computer and Information
    • /
    • v.15 no.10
    • /
    • pp.99-104
    • /
    • 2010
  • In this paper, the internal antenna for mobile communication handset which is able to control both coupling coefficient and resonant frequency without any major modification of radiator and ground plane of PIFA(Planner Inverted F Antenna). The resonant frequency as well as amount of coupling between feeding point and shorting post can be adjusted by changing inductance. Because the inductor is connected on shorting post where the strength of electric field is weak, the performance reduction of the proposed antenna is very small enough to neglect. For the variation of the inductance value within 3.3nH, the resonant frequency of antenna can have operating range of 1650MHz ~ 1830MHz. And as be increased the inductance, the coupling coefficient of antenna is over coupled. This means that it can be electrically controlled the resonant frequency and input impedance of antenna by inductance and minimized the mismatch loss. Size reduction of 10% for PIFA is obtained without any major modifications of antenna elements. For the frequency range from 1650 to 1830MHz, reduction of the measured antenna gain is within 0.93dB as varying the value of inductance from 0 to 3.3nH.

A Sensing Method of PoRAM with Multilevel Cell (멀티레벨 셀을 가지는 PoRAM의 센싱 기법)

  • Lee, Jong-Hoon;Kim, Jung-Ha;Lee, Sang-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.12
    • /
    • pp.1-7
    • /
    • 2010
  • In this paper, we suggested a sensing method of PoRAM with the multilevel cell When a specific voltage is applied between top and bottom electrodes of PoRAM unit cell, we can distinguish cell states by changing resistance values of the cell. Especially, we can use the PoRAM as the multilevel cell due to have four stable resistance values per cell. Therefore, we proposed an address decoding method, sense amplifier and control signal for sensing of a multilevel cell. The sense amplifier is designed based on a current comparator that compared a cell current the cell with a reference current, and have a low input impedance for a amplification of the current. The proposed circuit was designed in a $0.13{\mu}m$ CMOS technology, we verified to sense each data "00", "01", "10", "10" by four states of a cell current.