• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.7
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• pp.782-787
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• 2004

Superconducting flux flow transistor (SFFT) is based on a control of the Abrikosov vortex flowing along a channel. The induced voltage by moving of the Abrikosov vortex in an SFFT is greatly affected by the thickness, the width, and the length of channel. In order to fabricate a reproducible channel in the SFFT, we studied the variation of the critical characteristics of ${YBa}_2{Cu}_3{O}_7-\delta(YBCO)$ thin films with the etching time using ICP (Inductively coupled plasma) system. From the simulation, it was certified that the vortex velocity was increased in a low pinning energy at channel width 0,5 mm. The surfaces of YBCO thin film were etched by ICP etching system. We observed the etched channel surfaces by AFM (Atomic Force Microscope) and measured the critical current density with etching time. As a measured results, the etching thickness of channel should be optimized to fabricated a flux flow transistor with specified characteristics.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.274-281
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• 2010

This paper proposes a DFPS (Dual Frequency Power Source) impedance matching device for uniformity improvement of a semiconductor plasma etching system. The DFPS consists of two parts for safe plasma processing on large-area substrates. The first part is an ICP (Inductively Coupled Plasma) for high integration by using ferrite core. The second part is a CCP (Capacitive Coupled Plasma) to control uniformity of whole cells. Proposed DFPS can achieve high productivity improvement required for semiconductor equipment industry. The proposed plasma system is analyzed, simulated and experimentally verified with a matching equipment at 27.12MHz and 400kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.259-262
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• 2003

Superconducting flux flow transistor(SFFT) is based on a control of the Abrikosov vortex flowing along a channel. The induced voltage by moving of the Abrikosov vortex in SFFT is greatly affected by the thickness and width, of channel. In order to fabricate a reproducibility channel in SFFT, we have researched the variation of the critical characteristics of YBCO thin films with the etching time using ICP(Inductively coupled plasma) system. It was certified that the velocity of vortex decreased with increasing the width of channel and was saturated faster in low bias from a simulation. An etching mechanism of YBCO thin films by ICP system was also certified by AFM(Atomic Force Microscope) and by measuring the critical current density with etching time. As measurement result, we could analyze that we should optimize the etching thickness of channel part to construct a flux flow transistor with desired characteristics.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.11-16
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• 2002

In this study, the dry etching characteristics of $SrBi_2Ta_2O_9$ (SBT) thin films were investigated by using ICP-RIE (inductively coupled plasma-reactive ion etching). The etching damage and degradation were analyzed with XPS (X-ray photoelectron spectroscopy) and C-V (Capacitance-Voltage) measurement. The etching rate increased with increasing the ICP power and the capacitively coupled plasma (CCP) power. The etch rate of 900$\AA$/min was obtained with 700 W of ICP power and 200 W of CCP power. The main problem of dry etching is the degradation of the ferroelectric material. The damage-free etching characteristics were obtained with the $Ar/C1_2/CHF_3$ gas mixture of 20/14/2 when the ICP power and CCP power were biased at 700 W and 200 W, respectively. The experimental results show that the dry etching process with ICP-RIE is applicable to the fabrication of the single transistor type ferroelectric memory device.

• Korean Journal of Materials Research
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• v.13 no.4
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• pp.266-270
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• 2003

We studied BCl$_3$ dry etching of GaAs in a planar inductively coupled plasma system. The investigated process parameters were planar ICP source power, chamber pressure, RIE chuck power and gas flow rate. The ICP source power was varied from 0 to 500 W. Chamber pressure, RIE chuck power and gas flow rate were controlled from 5 to 15 mTorr, 0 to 150 W and 10 to 40 sccm, respectively. We found that a process condition at 20 sccm $BCl_3$ 300 W ICP, 100 W RIE and 7.5 mTorr chamber pressure gave an excellent etch result. The etched GaAs feature depicted extremely smooth surface (RMS roughness < 1 nm), vertical sidewall, relatively fast etch rate (> $3000\AA$/min) and good selectivity to a photoresist (> 3 : 1). XPS study indicated a very clean surface of the material after dry etching of GaAs. We also noticed that our planar ICP source was successfully ignited both with and without RIE chuck power, which was generally not the case with a typical cylindrical ICP source, where assistance of RIE chuck power was required for turning on a plasma and maintaining it. It demonstrated that the planar ICP source could be a very versatile tool for advanced dry etching of damage-sensitive compound semiconductors.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.37-40
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• 2001

The semiconductor's design rule becomes more stringent, hence the silicon-dioxide etching technique is important issue. In this work we compared the etching characteristics of different three types of Plasma source, Normal ICP, magnetized ICP and E-IC $P^{TM}$. The E-IC $P^{TM}$ source shows higher etch rate at lower pressure and this is advantageous for the fine pattern process. The etching characteristics were varied with external magnetic field frequency at I-lCP and this is examined with Nanospe $c^{TM}$ and SEM. We designed Langmuir probe system for time resolved diagnosis. ion density of E-ICP is varying periodically with the applied external magnetic field frequencyquency

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.162-163
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• 2007

The dry etching of Si was investigated using direct dc biasing to the Si substrate. The TCP type etching system with a feed-through for applying a dc bias was used in the etching. The applied dc bias and ICP power was varied to examine the effect on the etching at the fixed chamber pressure and $SF_6$ flow rate of 10 mTorr and 10 sccm during. When the plasma was generated at ICP power of 100 W, the etch rate of Si was increased with the bias for the biased samples. However, the etching of Si for the non-biased sample was enhanced for the increased ICP power.

• Clean Technology
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• v.9 no.3
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• pp.101-105
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• 2003

Plasma etching technology has been developed since it is recognized that silicon etching is very crucial in MEMS(Micro Electro Mechanical System) technology. In this study ICP(Inductive Coupled Plasma) technology was used as a new plasma etching to increase ion density without increasing ion energy, and to maintain the etching directions. This plasma etching can be used for many MEMS applications, but it has been used for PCR(Polymerase Chain Reaction) device fabrication. Platen power, Coil power and process pressure were parameters for observing the etching rate changes. Conclusively Platen power 12W, Coil power 500W, etchng/passivation cycle 6/7sec gives the etching rate of $1.2{\mu}m/min$ and sidewall profile of $90{\pm}0.7^{\circ}$, exclusively. It was concluded from this study that it was possible to minimize the environmental effect by optimizing the etching process using SF6 gas.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.32-38
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• 2021

We developed an inductively coupled plasma (ICP) etcher for GaN etching using a parallel plasma electrode source with a multifunctional chuck matched to it in order for the low power consumption and low process cost in comparison with the conventional ICP system with a helical-type plasma electrode source. The optimization process condition using it for the micro light-emitting diode (µ-LED) chip fabrication was established, which is an ICP RF power of 300 W, a chuck power of 200 W, a BCl₃/Cl₂ gas ratio of 3:2. Under this condition, the mesa structure with the etch depth over 1 ㎛ and the etch angle over 75° and also with no etching residue was obtained for the µ-LED chip. The developed ICP showed the improved values on the process pressure, the etch selectivity, the etch depth uniformity, the etch angle profile and the substrate temperature uniformity in comparison with the commercial ICP. The µ-LED chip fabricated using the developed ICP showed the similar or improved characteristics in the L-I-V measurements compared with the one fabricated using the conventional ICP method

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05e
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• pp.77-80
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• 2003

MEMS(Micro Electro Mechanical System) 기술에서 실리콘 식각기술의 중요성으로 플라즈마 식각기술의 개발이 꾸준히 진행되고 있다. 이중에서 ICP(Inductive Coupled Plasma)는 기존의 증착장치에 유도결합식 플라즈마를 추가로 발생시켜 증착막의 특성을 획기적으로 개선시키는 가장 최근에 개발된 기술이며, 이용에너지를 증가시키지 않고도 이용밀도를 높이고 이용업자들에 방향성을 가할 수 있는 새로운 플라즈마 기술로, 주로 MEMS 제조공정에 응용되고 있다. 본 연구에서는 STS-ICP $ASE^{HR}$을 이용하여 식각과 증착공정을 반복하여 식각을 하는 Bosch 식각에 관하여 연구하였다 STS-ICP $ASE^{HR}$ 장비의 Platen power, Coil power 및 Process pressure에 다양한 변화를 주어 각 변수에 따른 식각속도를 관찰하였다. 각 공정별 변수를 변화시킨 결과 Platen power 12W, Coil power 500W, 식각/Passivation Cycle 6/7sec 일 경우 식각속도는 $1.2{\mu}m$/min 이었고, Sidewall profile은 $90{\pm}0.7^{\circ}$로 나타나 매우 우수한 결과를 보였다.