• 대한전자공학회논문지
• /
• 제25권6호
• /
• pp.637-646
• /
• 1988

The CMOS physical parameters are extracted using by processing models in fabrication steps, processing parameters, fabrication disturbances, control parameters. Statistical CMOS process and device simulator is proposed to evaluate the effect of inherent fluctuations in IC fabrication. Using this simulator, we perform worst case analysis in terms of statistically independent disturbances and compare this proposed method to Monte Carlo method, previous Worst Case method. And simulation results with this proposed method are more accurate than the past worst case analysis. This package is written in C language and runs on a IBM PC AT(OPUS).

• 대한전자공학회논문지
• /
• 제24권6호
• /
• pp.992-997
• /
• 1987

This paper describes the design and fabrication of an integrated circuit that can separate the horizontal SYNC., vertical SYNC. and composite SYNC. signal included in a composite video signal. The circuit that is based on the comparator level samplign method can separate a stable SYNC. signal even from an external circuit with large variation. It has been fabrivated by the SST bipolar process. Its chip size is 1.5x1.5mm\ulcorner As a result, we succeeded in fabrication of IC which satisfied DC characteristics and SYNC. singal separator function.

• 전자공학회논문지D
• /
• 제35D권1호
• /
• pp.34-40
• /
• 1998

For applicating to 10-Gbit/s optical transimission systems, we have designed and fabricated a laser driver IC with extremely-high-operation-frequencies using AlGaAs/GaAs heterojunction bipolar transistors (HBTs), and have investigated its performances. Circuits design andsimulation were performed using SPICE and LIBRA. A discrete AlGaAs/GaAs HBT with the emitter area of 1.5*10 .mu.m$^{2}$, used for the circuit fabrication, exhibited cutoff frequency of 63 GHz andmaximum osciallation frquency of 50 GHZ. After fabrication of MMICs, we observed the very wide bandwidth of DC~18 GHz and the S$_{21}$ gain of 17 dB for a laser driver IC from the on-wafer measurement. Metal-packaged laser driver IC showed the excellent eye opening, the modulation currents of 32 mA, the rise/fall time of 40 ps, measured at the data rates of 10-Gbit/s.

• Transactions on Electrical and Electronic Materials
• /
• 제5권2호
• /
• pp.41-49
• /
• 2004

Layer transfer process has emerged as a promising tool in the field of thin silicon solar cell technology. This process can use mono-crystalline silicon as a surface for the epitaxial growth of a thin layer of silicon. It requires some sort of surface conditioning of the substrate due to which the surface become suitable for homo-epitaxy and lift off after solar cell fabrication. The successful reuse of substrate has been reported. The use of the conditioned surface without any kind of epitaxial layer growth is also the issue to be addressed. This review paper basically describes the five most cost effective methods on which works are in progress. Several types of possible problems envisaged by different research groups are also incorporated here with necessary discussion. Work in Korea has already started in this area in collaboration IC Design and Fabrication Centre, Jadavpur University, India and that also has been mentioned.

• 한국광학회:학술대회논문집
• /
• 한국광학회 2008년도 하계학술발표회 논문집
• /
• pp.325-326
• /
• 2008

• 한국레이저가공학회지
• /
• 제14권1호
• /
• pp.14-18
• /
• 2011

Semiconductor industry demands decrease in line/space dimensions of IC substrates. Particularly for IC substrates for CPU, line/space dimensions below $10{\mu}m/10{\mu}m$ are expected to be used in production since 2014. Conventional production technologies (SAP, etc.) based on photolithography are widely agreed to be reaching capability limits. To address this limitation, the embedded circuit fabrication technology using laser ablation has been recently developed. In this paper, we used a nanosecond UV laser and a picosecond UV laser to fabricate embedded circuit patterns into a buildup film with $SiO_2$ powders for IC substrate. We conducted SEM and EDS analysis to investigate surface quality of the embedded circuit patterns. Experimental results showed that due to higher recoil pressure, picosecond UV laser ablation of the buildup film generated a better surface roughness.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
• /
• pp.209-211
• /
• 2001

The core in developing the transformer-operated 3 phase solid state meter is to design a single chip IC, that incorporates all the necessary features required for development of the 3 phase solid state meter. Using this technology, the solid state meter can be mass produced at lower cost and higher quality. This report deals with the performance of the prototype FPGA board, which is the final step before actual IC fabrication in fabrication LAB. All the features of FPGA board, shown in this report will be included in the final ASIC IC product.

• 정보보호학회논문지
• /
• 제9권2호
• /
• pp.49-60
• /
• 1999

IC 카드의 하드웨어적인 제약으로 대부분의 IC 카드는 대칭키 알고리즘을 사용하고 있지만 IC 카드 하드웨어 제조 기술의 발전으로 앞으로는 보안성이 우수한 비대 칭키 알고리즘이 많이 사용될 것이다. 그리고 IC 카드의 가장 큰 제약적 중 하나는 메모리 용량의 한계이다. 따라서 보안상 안전하면서도 메모리를 적게 사용하는 IC 카드 운영체제의 구현을 중요한 문제이다. 그래서 본 논문에서는 다양한 종류의 키 알고리즘을 수용할 수 있는 키 파일 탐색 기법을 제안하였다. 또한 데이터 파일 헤더에 잠금 필드를 삽입하여 보안성을 향상시켰으며 메모리 사용량을 줄일 수 있도록 데이터 파일 헤더만을 이용한 파일 탐색 기법과 자유 공간 탐색 기법을 제안하였다. Because of the evolution of IC card hardware fabrication technologies IC card will be able to accept asymmetric key encryption algorithm in the future. One of the most restrictive points of IC card is memory capacity. Therefore it is an important problem to design a secure IC card operating system using memory in small. In this paper we proposed a key file search mechanism using a key length field inserted in a key file header structure. The key file search mechanism makes IC card execute any key-based encryption algorithm. In addition we proposed inserting a lock field in data file header structure. The lock field intensifies the security of a data file. Finally we proposed a data file search mechanism and free space search mechanism using only data file header. The file system using these mechanisms spends smaller memory than that using a file description table and record of unallocated space.

• 전자공학회논문지B
• /
• 제30B권8호
• /
• pp.71-75
• /
• 1993

This paper presents a neural network IC for Korean vowels recognition. The neural network is composed with three levels and which is learned by Back Propagation algorithm. In the neural network IC, the neuron bodys and synapses are implemented with CMOS inverters and ion-implanted polysilicon resistors.

• Journal of Power Electronics
• /
• 제17권5호
• /
• pp.1372-1381
• /
• 2017

This paper presents a high-side switch driver IC capable of improving the current sensing accuracy and providing reverse battery protection. Power semiconductor switches used to replace relay switches are encumbered by two disadvantages: they are prone to current sensing errors and they require additional external protection circuits for reverse battery protection. The proposed IC integrates a gate driver and current sensing blocks, thus compensating for these two disadvantages with a single IC. A p-sub-based 90-V $0.13-{\mu}m$ bipolar-CMOS-DMOS (BCD) process is used for the design and fabrication of the proposed IC. The current sensing accuracy (error ${\leq}{\pm}5%$ in the range of 0.1 A-6.5 A) and the reverse battery protection features of the proposed IC were experimentally tested and verified.