• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.85-88
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• 2001

This paper suggests an improved switch architecture for the rechargeable battery protection IC. In the existing protection IC, charging and discharging switches composed of the CMOS transistor and the diode are external components. It is difficult to integrate the switches in a CMOS process due to the large chip-size overhead and inevitable parasitic effects. In this paper, we propose a new switch architecture of the MOSFET's 'diode connection' method. The performance and chip-size overhead are proved to be adequate for the fully integrated protection IC.

• Journal of Mechanical Science and Technology
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• 제18권3호
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• pp.357-369
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• 2004

The purposes of the paper are to analyze the fracture phenomenon by delamination and cracking when the encapsulant of plastic IC package with polyimide coating shows viscoelastic behavior under hygrothermal loading in the IR soldering process and to suggest more reliable design conditions by the approaches of stress analysis and fracture mechanics. The model is the plastic SOJ package with the polyimide coating surrounding chip and dimpled diepad. On the package without cracks, the optimum position and thickness of polyimide coating to decrease the maximum differences of strains at the bonding surfaces of parts of the package are studied. For the model delaminated fully between the chip and the dimpled diepad, C(t)-integral values are calculated for the various design variables. Finally, the optimal values of design variables to depress the delamination and crack growth in the plastic IC package are obtained.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1069-1072
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• 1998

Recently the development of design and automation technology and manufacturing method, has reduced the cost of chip, but it becomes more difficult to test IC chip because test technique doesn't keep up with these techniques. In case of IC testing, obtaining test vectors to be able to detect good chip or bad one is very important, but according to increasing complexity, it is very complex and difficult. Another problem is that during testing, there could be capability of physical and electrical damage on chip. Also there is difficulty in synchronization between CUT (circuit under test) and Test equipment〔1〕. Because of these difficulties, built in self test has been proposed. Not only obtaining test vectors but also reducing test time becomes hot issues nowadays. This paper presents a new test BIST(built in self test) method. Proposed BIST implementation reduces test time and obtains high fault coverage. By searching internal nodes in which are inserted test_point_cells〔2〕and allocating TPG(test pattern generation) stages, test length becomes much shorter.

• 전자공학회논문지C
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• 제35C권1호
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• pp.34-41
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• 1998

In this paper, I designed a P1394 serial bus chip as new bus interface architecture which can transmit the multimedia data at the rate of 400 Mbps and guarantee necessary bandwidth. because multimedia data become meaningless data after appropriate time, it is necessary to transfer multimedia data in real time, P1394 serial bus chip designed in this paper support isochronous transfer mode to solve this problem. Also, designed P1394 serial bus chip can transfer high quality video data or high quality audio data because it support the speed of 400 Mbps. While user must set device ID manually in previous interface such as SCSI, device ID is automatically determined if user connect each node with designed P1394 serial bus cable and power on. To design this chip, I verified the behavioral of the entrire system and synthesized layout. Also, I did layout the analog blocks and blocks which must be optimized in full custom.

• 전기전자학회논문지
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• 제20권4호
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• pp.428-431
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• 2016

현재 바이폴러만의 프로세스(bipolar only process)로 사용되는 전력반도체는 대부분의 반도체 생산업체에서 제공하는 Bipolar-CMOS-DMOS(BCD) 프로세스를 사용함으로써 하나의 웨이퍼에 여러 IP와 기존 IC들을 융합하여 복합칩으로 구현하고자 한다. 이번 연구에서는 보편적으로 사용되는 IP인 레귤레이터(regulator)와 연산 증폭기를 바이폴러만의 프로세스에서 BCD 프로세스로 구현하였다. 이를 사용한 간단한 응용으로 파워 스위칭 센서 IC를 설계하여 실리콘 칩에서 검증하였다. 검증 결과로 시뮬레이션과 작동 테스트가 잘 일치하고 있음을 확인할 수 있었다.

• 한국통신학회논문지
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• 제26권12B호
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• pp.1695-1702
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• 2001

본 논문에서는 4 Mb/s 부터 100 Mb/s 의 IrDA(Infrared Data Association) 응용이 가능한 CMOS infrared (IR) wireless data link IC의 설계 방법에 대해 기술한다. 이 모듈은 60 dB에서 100 dB가지의 이득 범위를 가지는 variable gain transimpedance amplifier, AGC(automatic gain control) 회로, AOC(automatic offset control) loop, 4 PPM (pulse position modulation) modulator/demodulator와 DLL(delay locked loops)로 구성된다. 본 적외선 광송수신 IC는 0.25 um 1-poly 5-metal CMOS 공정을 이용하여 제작되었다. 2.5 V 전원 전압에서 동작시켰으며 100 Mb/s에서 출력단 버퍼를 제외하고 25 mW의 진력을 소모한다. 칩의 크기는 1.5 mm $\times$ 1 mm이다.

• 비파괴검사학회지
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• 제12권4호
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• pp.18-25
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• 1993

This paper is to aim the microdefect evaluation of If package into a quantitative from NDI's image processing of ultrasonic wave. (1) Automatically repeated discrimination analysis method can be devided in the category of all kind of defects on IC package, and also can be possible to have a sampling of partial delamination. (2) It is possible that the information of edge section in silicon chip surrounding can be extractor by the partial image processing of IC package. Also, the crack detection is possible between the resin part and lead frame.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.445-453
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• 2015

A fully integrated cost-effective and low-power single chip Lithium-Ion (Li-Ion) battery protection IC (BPIC) for portable devices is presented. The control unit of the battery protection system and the MOSFET switches are integrated in a single package to protect the battery from over-charge, over-discharge, and over-current. The proposed BPIC enters into low-power standby mode when the battery becomes over-discharged. A new auto release function (ARF) is adopted to release the BPIC from standby mode and safely return it to normal operation mode. A new delay shorten mode (DSM) is also proposed to reduce the test time without increasing pin counts. The BPIC implemented in a $0.18-{\mu}m$ CMOS process occupies an area of $750{\mu}m{\times}610{\mu}m$. With DSM enabled, the measured test time is dramatically reduced from 56.82 s to 0.15 s. The BPIC chip consumes $3{\mu}A$ under normal operating conditions and $0.45{\mu}A$ under standby mode.

• 전기전자학회논문지
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• 제1권1호
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• pp.1-10
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• 1997

It is well-known that rectangular bulk-Si sensors prepared by etch or epi etch-stop micromachining technology are already in practical use today, but the conventional bulk-Si sensor shows some drawbacks such as large chip size and limited applications as silicon sensor device is to be miniaturized. We consider a circular-shape SOI(Silicon-On-Insulator) micro-cavity technology to facilitate multiple sensors on very small chip, to make device easier to package than conventional sensor like pressure sensor and to provide very high over-pressure capability. This paper demonstrates the cross-functional results for stress analyses(targeting $5{\mu}m$ deflection and 100MPa stress as maximum at various applicable pressure ranges), for finding permissible diaphragm dimension by output sensitivity, and piezoresistive sensor theory from two-type SOI structures where the double SOI structure shows the most feasible deflection and small stress at various ambient pressures. Those results can be compared with the ones of circular-shape bulk-Si based sensor$^{[17]}. The SOI micro-cavity formed the sensors is promising to integrate with calibration, gain stage and controller unit plus high current/high voltage CMOS drivers onto monolithic chip.

• 마이크로전자및패키징학회지
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• 제6권3호
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• pp.1-7
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• 1999

본 연구에서는 900MHz대역 수신기용으로 선행 개발되어진 RF 칩세트를 장착한 RF 특성평가 보드를 개발하였으며, 환경평가시험을 수행하였다. 선행 개발되어진 RF-IC 칩에는 저잡음증폭기, 하향변조 주파수혼합기, AGC Amp, SW-CAP 필터 등을 포함하고 있으며, 이에 따른 정합회로와 RF/IF SAW 필터, 듀플렉서 필터 및 전원공급회로를 RF 특성평가보드에 첨가하여 제작하였다. 공급전원은 2.7에서 3.6V이며, RF 보드의 소모전류는 42mA로 나타났으며, 동작 주파수는 RF 입력이 925~960MHz으로 제작, 측정되었다. 측정결과 일반적인 900MHz용 디지털 이동통신단말기의 RF 수신특성과 유사하게 양호한 결과를 보였다.