• 제목/요약/키워드: Hybrid channel FET

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Enhanced pH Response of Solution-gated Graphene FET by Using Vertically Grown ZnO Nanorods on Graphene Channel

  • Kim, B.Y;Jang, M.;Shin, K.-S.;Sohn, I.Y;Kim, S.-W.;Lee, N.-E
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.434.2-434.2
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    • 2014
  • We observe enhanced pH response of solution-gated field-effect transistors (SG-FET) having 1D-2D hybrid channel of vertical grown ZnO nanorods grown on CVD graphene (Gr). In recent years, SG-FET based on Gr has received a lot of attention for biochemical sensing applications, because Gr has outstanding properties such as high sensitivity, low detection limit, label-free electrical detection, and so on. However, low-defect CVD Gr has hardly pH responsive due to lack of hydroxyl group on Gr surface. On the other hand, ZnO, consists of stable wurtzite structure, has attracted much interest due to its unique properties and wide range of applications in optoelectronics, biosensors, medical sciences, etc. Especially, ZnO were easily grown as vertical nanorods by hydrothermal method and ZnO nanostructures have higher sensitivity to environments than planar structures due to plentiful hydroxyl group on their surface. We prepared for ZnO nanorods vertically grown on CVD Gr (ZnO nanorods/Gr hybrid channel) and to fabricate SG-FET subsequently. We have analyzed hybrid channel FETs showing transfer characteristics similar to that of pristine Gr FETs and charge neutrality point (CNP) shifts along proton concentration in solution, which can determine pH level of solution. Hybrid channel SG-FET sensors led to increase in pH sensitivity up to 500%, compared to pristine Gr SG-FET sensors. We confirmed plentiful hydroxyl groups on ZnO nanorod surface interact with protons in solution, which causes shifts of CNP. The morphology and electrical characteristics of hybrid channel SG-FET were characterized by FE-SEM and semiconductor parameter analyzer, respectively. Sensitivity and sensing mechanism of ZnO nanorods/Gr hybrid channel FET will be discussed in detail.

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Graphene for MOS Devices

  • 조병진
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2012년도 춘계학술발표대회
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    • pp.67.1-67.1
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    • 2012
  • Graphene has attracted much attention for future nanoelectronics due to its superior electrical properties. Owing to its extremely high carrier mobility and controllable carrier density, graphene is a promising material for practical applications, particularly as a channel layer of high-speed FET. Furthermore, the planar form of graphene is compatible with the conventional top-down CMOS fabrication processes and large-scale synthesis by chemical vapor deposition (CVD) process is also feasible. Despite these promising characteristics of graphene, much work must still be done in order to successfully develop graphene FET. One of the key issues is the process technique for gate dielectric formation because the channel mobility of graphene FET is drastically affected by the gate dielectric interface quality. Formation of high quality gate dielectric on graphene is still a challenging. Dirac voltage, the charge neutral point of the device, also strongly depends on gate dielectrics. Another performance killer in graphene FET is source/drain contact resistance, as the contact resistant between metal and graphene S/D is usually one order of magnitude higher than that between metal and silicon S/D. In this presentation, the key issues on graphene-based FET, including organic-inorganic hybrid gate dielectric formation, controlling of Dirac voltage, reduction of source/drain contact resistance, device structure optimization, graphene gate electrode for improvement of gate dielectric reliability, and CVD graphene transfer process issues are addressed.

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