• 제목/요약/키워드: High-voltage bias

검색결과 450건 처리시간 0.032초

Effects of Channel Electron In-Plane Velocity on the Capacitance-Voltage Curve of MOS Devices

  • Mao, Ling-Feng
    • ETRI Journal
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    • 제32권1호
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    • pp.68-72
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    • 2010
  • The coupling between the transverse and longitudinal components of the channel electron motion in NMOS devices leads to a reduction in the barrier height. Therefore, this study theoretically investigates the effects of the in-plane velocity of channel electrons on the capacitance-voltage characteristics of nano NMOS devices under inversion bias. Numerical calculation via a self-consistent solution to the coupled Schrodinger equation and Poisson equation is used in the investigation. The results demonstrate that such a coupling largely affects capacitance-voltage characteristic when the in-plane velocity of channel electrons is high. The ballistic transport ensures a high in-plane momentum. It suggests that such a coupling should be considered in the quantum capacitance-voltage modeling in ballistic transport devices.

Pulsed Magnetron Sputtering Deposit ion of DLC Films Part I : Low-Voltage Bias-Assisted Deposition

  • Oskomov, Konstantin V.;Chun, Hui-Gon;You, Yong-Zoo;Lee, Jing-Hyuk;Kim, Kwang-Bok;Cho, Tong-Yul;Sochogov, Nikolay S.;Zakharov, Alexender N.
    • 한국표면공학회지
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    • 제36권1호
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    • pp.27-33
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    • 2003
  • Pulsed magnetron sputtering of graphite target was employed for deposition of diamond-like carbon (DLC) films. Time-resolved probe measurements of magnetron discharge plasma have been performed. It was shown that the pulsed magnetron discharge plasma density ($∼10^{17}$ $m^{-3}$ ) is close to that of vacuum arc cathode sputtering of graphite. Raman spectroscopy was sed to examine DLC films produced at low ( $U_{sub}$ / < 1 kV) pulsed bias voltages applied to the substrate. It has been shown that maximum content of diamond-like carbon in the coating (50-60%) is achieved at energy per deposited carbon atom of $E_{c}$ =100 eV. In spite of rather high percentage of $sp^3$-bonded carbon atoms and good scratch-resistance, the films showed poor adhesion because of absence of ion mixing between the film and the substrates. Electric breakdowns occurring during the deposition of the insulating DLC film also thought to decrease its adhesion.

CFUBM Sputtering법으로 증착시킨 티타늄이 첨가된 비정질 탄소 박막의 기계적 특성 연구 (Mechanical Properties of Ti doped Amorphous Carbon Films prepared by CFUBM Sputtering Method)

  • 조형준;박용섭;김형진;최원석;홍병유
    • 한국전기전자재료학회논문지
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    • 제20권8호
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    • pp.706-710
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    • 2007
  • Ti-containing amorphous carbon (a-C:Ti) films shows attractive mechanical properties such as low friction coefficient, good adhesion to various substrate and high wear resistance. The incorporation of titanium in a-C films is able to improve the electrical conductivity, friction coefficient and adhesion to various substrates. In this study, a-C:Ti films were depositied on Si wafer by closed-field unbalanced magnetron (CFUBM) sputtering system composed two targets of carbon and titanium. The tribological properties of a-C:Ti films were investigated with the increase of DC bias voltage from 0 V to - 200 V. The hardness and elastic modulus of films increase with the increase of DC bias voltage and the maximum hardness shows 21 GPa. Also, the coefficient of friction exhibites as low as 0.07 in the ambient. In the result, the a-C:Ti film obtained by CFUBM sputtering method improved the tribological properties with the increase of DC bias volatage.

SILC 특성에 의한 실리콘 산화막의 신뢰성 연구 (The Study of Reliability by SILC Characteristics in Silicon Oxides)

  • 강창수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.17-20
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    • 2002
  • This study has been investigated that traps generated inside of the oxide and at the oxide interfaces by the stress bias voltage. The traps are charged near the cathode with negative charge and charged near the anode with positive charge. The charge state of the traps can easily be changed by application of low voltages after the stress high voltage. These trap generation involve either electron impact ionization processes or high field generation processes. It determined to the relative traps locations inside the oxides ranges from 113.4A to 814A with capacitor areas of 10$^{-3}$ $\textrm{cm}^2$ The oxide charge state of traps generated by the stress high voltage contain either a positive or negative charge.

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Annealing temperature dependence on the positive bias stability of IGZO thin-film transistors

  • Shin, Hyun-Soo;Ahn, Byung-Du;Rim, You-Seung;Kim, Hyun-Jae
    • Journal of Information Display
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    • 제12권4호
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    • pp.209-212
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    • 2011
  • The threshold voltage shift (${\Delta}V_{th}$) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at $700^{\circ}C$. The degradation of the saturation mobility (${\mu}_{sat}$) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at $700^{\circ}C$, it showed a smaller ${\Delta}V_{th}$ under PBS conditions for $10^4$ s than the samples that were annealed at $500^{\circ}C$, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at $600^{\circ}C$ showed the best performance and the smallest ${\Delta}V_{th}$ among the fabricated samples with a ${\mu}_{sat}$ of $9.38cm^2/V$ s, an S-factor of 0.46V/decade, and a ${\Delta}V_{th}$ of 0.009V, which is due to the passivation of the defects by high thermal annealing without structural change.

출력전류 제어 기능이 향상된 고휘도 LED 구동 IC 설계 (Design of the High Brightness LED Driver IC with Enhanced the Output Current Control Function)

  • 송기남;한석붕
    • 한국전기전자재료학회논문지
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    • 제23권8호
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    • pp.593-600
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    • 2010
  • In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 ${\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.

출력전류 제어 기능이 향상된 고휘도 LED 구동 IC 설계 (Design of the High Brightness LED Driver IC with Enhanced the Output Current Control Function)

  • 한석붕;송기남
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.9-9
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    • 2010
  • In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

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고전압 MLCC 시험을 위한 에너지 회수 회로 제안 (Proposal of the Energy Recovery Circuit for Testing High-Voltage MLCC)

  • 공소정;권재현;홍대영;하민우;이준영
    • 전력전자학회논문지
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    • 제27권3호
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    • pp.214-220
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    • 2022
  • This paper proposes a test device designed for developing a high-voltage multilayer ceramic capacitor (MLCC). The proposed topology consists of an energy recovery circuit for charging/discharging capacitor, a flyback converter, and a boost converter for supplying power and a bias voltage application to the energy recovery circuit. The energy recovery circuit designed with a half-bridge converter has auxiliary switches operating before the main switches to prevent excessive current from flowing to the main switches. A prototype has been designed to verify the reliability of target capacitors following the voltage fluctuation with a frequency range below 65 kHz. To conduct high root mean square (RMS) current to the capacitor as a load, the MLCC test was conducted after the topology verification was completed through the film capacitor as a load. Through the agreement between the RMS current formula proposed in this paper and the MLCC test results, the possibility of its use was demonstrated for high-voltage MLCC development in the future.

Field emission characteristics of carbon nanfiber bundles

  • Kim, Sung-Hoon
    • 한국결정성장학회지
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    • 제14권5호
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    • pp.211-214
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    • 2004
  • Carbon nanofiber bundles were formed on silicon substrate using microwave plasma-enhanced chemical vapor deposition system. These bundles were vertically well-grown under the high negative bias voltage condition. The bundles were composed of the individual carbon nanofiber having less than 100 nm diameters. Turn-on voltage of the field emission was measured around 0.8 V/$\mu\textrm{m}$. Fowler-Nordheim plot of the measured values confirmed the field emission characteristic of the measured current.

넓은 범위의 전류 출력을 갖는 고선형 전압-제어 전류원 회로 (High-linearity voltage-controlled current source circuits with wide range current output)

  • 차형우
    • 대한전자공학회논문지SD
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    • 제41권7호
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    • pp.89-96
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    • 2004
  • 넓은 범위의 전압-제어 발진기 및 자동 이득 조절기의 실현을 위한 고선형 전압-제어 전류원(VCCS) 회로를 제안하였다. 제안한 VCCS는 전압 입력을 위해 이미터 폴로워, 전류 출력을 위해 이미터가 결합된 두 개의 공통-베이스 증폭기, 그리고 넓은 범위의 전류 출력과 높은 선형성을 얻기 위해 두 증폭기를 결합한 전류 미러로 구성된다. VCCS의 회로는 별도의 바이어스회로가 없이 단지 5개의 트랜지스터와 1개의 저항기만 사용하였다. 시뮬레이션 결과 제안한 VCCS는 5V의 공급전압에서 1V에서 4.8V까지의 제어-전압에 대하여 최대 0A에서 300㎃까지의 전류를 출력할 수 있다. 0㎃에서 300㎃의 출력 전류의 최대 선형 오차는 1.4 %이였다.