• Journal of Convergence for Information Technology
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• v.8 no.6
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• pp.237-242
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• 2018

There are various 'wireless communication technologies' around us. Wireless mobile communication has evolved through various stages, and its utilization is also diverse. However, due to the development of wireless communication technology, the demand for frequency resources is much higher than the supply, so frequency shortage is serious. Recently, 'visible light communication' has been attracting attention as an emerging communication technology that can solve the frequency shortage. 'Visible light communication' is a communication method based on serial data transmission / reception, and there is a difficulty in transmitting / receiving parallel data because the transmitter and the receiver are arbitrarily present. In this paper, we have studied parallel data processing of visible light communication. We could solve the problem by analyzing parallel data using image processing. Through this study, communication performance can be verified through I / O data comparison by implementing parallel data analysis method. It is expected that diversity in parallel data analysis will be presented through the results.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.499-500
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• 2008

기존 칩들 사이에 사용되는 인터페이스는 많은 선을 사용하여 EMI문제를 발생시키고 PCB에 많은 중간을 차지한다. 이를 해결하기 위하여 개발된 UniPro는 적은 선으로 빠른 통신속도를 지원하며 저전력 통신을 위하여 D-PHY와 함께 사용된다. 본 논문에서는 MIPI 규격의 UniPro를 설계하였다. 설계된 UniPro는 4개의 데이터 레인과 1개의 클럭 레인으로 구성하여 디바이스 사이의 데이터 및 제어신호를 전송 가능하다. 또한 낮은 전력소모를 위하여 전원 관리 장치를 추가하였으며 수신한 데이터의 에러검출이 가능하도록 설계하여 신뢰도를 높였다. 설계된 인터페이스는 5,160 Gate크기이며 속도는 98MHz이다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.6
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• pp.1-7
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• 2008

FlexRay is a new standard of network communication system which provides a high speed serial communication, time triggered bus and fault tolerant communication between electronic devices for future automotive applications. FlexRay communication controller (CC) is the core of the FlexRay protocol specification. In this paper, we first design the FlexRay CC protocol specification and function parts using SDL (Specification and Description Language). Then, the system is re-designed using Verilog HDL based on the SDL source. The FlexRay CC system was synthesized using Samsung $0.35\;{\mu}m$ technology. It is shown that the designed system can operate in the frequency range above 80 MHz. In addition, to show the validity of the designed FlexRay system the FlexRay system is combined with sound source localization system in Robot applications. The combined system is implemented using ALTERA Excalibur ARM EPXA4F672C3. It is shown that the implemented system operates successfully.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.182-184
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• 2009

FlexRay is a new standard of network communication system which provides a high speed serial communication, time triggered bus and fault tolerant communication between electronic devices for future automotive and ship applications. FlexRay communication controller(CC) is the core of the FlexRay protocol specification. In this paper, we first design the FlexRay CC protocol specification and function parts using SDL(Specification and Description Language). Then, the system is re-designed using Verilog HDL based on the SDL source. The FlexRay CC system was synthesized using Samsung $0.35{\mu}m$ technology. It is shown that the designed system can operate in the frequency range above 80 MHz. In addition, to show the validity of the designed FlexRay system, the FlexRay system is combined with sound source localization system in Robot applications. The combined system is implemented using ALTERA Excalibur ARM EPXA4F672C3. It is shown that the implemented system operates successfully.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.5
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• pp.590-597
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• 2002

Currently, with the increasing demand for combining cellular phone and PDA, various kinds of PDA-phones are being developed. A typical PDA-phone consists of a CDMA processor and a PDA processor. Generally, a UART serial communication port is used for inter-processor communication. However, the CDMA standard will need more data bandwidth over 2Mbps with the emergence of IMT-2000. The bandwidth requirement is beyond the capability of UART. In this paper, several inter-processor communication mechanisms are analyzed and especially Dual Port Memory and USB were chosen as the candidates for the new communication mechanism. A prototype PDA-phone board has been implemented for experiment. The experimental result shows that Dual Port Memory is better than USB in cost performance.

• Journal of IKEEE
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• v.19 no.3
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• pp.342-348
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• 2015

High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.

• Journal of information and communication convergence engineering
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• v.11 no.1
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• pp.7-11
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• 2013

Wearable computer systems use the wireless universal serial bus (WUSB), which refers to USB technology that is merged with WiMedia physical layer and medium access control layer (PHY/MAC) technical specifications. WUSB can be applied to wireless personal area network (WPAN) applications as well as wired USB applications such as PAN. WUSB specifications have defined high-speed connections between a WUSB host and WUSB devices for compatibility with USB 2.0 specifications. In this paper, we focus on an integrated system with a WUSB over an IEEE 802.15.6 wireless body area network (WBAN) for wireless wearable computer systems. Due to the portable and wearable nature of wearable computer systems, the WUSB over IEEE 802.15.6 hierarchical medium access control (MAC) protocol has to support power saving operations and integrate WUSB transactions with WBAN traffic efficiently. In this paper, we propose a low-power hibernation technique (LHT) for WUSB over IEEE 802.15.6 hierarchical MAC to improve its energy efficiency. Simulation results show that the LHT also integrates WUSB transactions and WBAN traffic efficiently while it achieves high energy efficiency.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.4
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• pp.580-585
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• 2010

In this paper, The object Tracking System is designed by SOPC based Nios II embedded processor and C2H compiler. And this system using single PTZ camera can effectively control IPs in the platform of SOPC based Nios II Embedded Processor and creating IP by C2H(C-To-Hardware) compiler for image-in/output, image-processing and devices of communication that can supply various monitoring information to network or serial. Accordingly, Special quality and processing speed of object tracking using high-quality algorism in the system is improved by hardware/software programming methods.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.5
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• pp.205-211
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• 2009

The Weightless Neural Network(WNN) has the advantage of the processing speed, less computability than weighted neural network which readjusts the weight. Especially, The behavior information such as sequential gesture has many serial correlation. So, It is required the high computability and processing time to recognize. To solve these problem, Many algorithms used that added preprocessing and hardware interface device to reduce the computability and speed. In this paper, we proposed the Ram based Sequential Cumulative Neural Network(SCNN) model which is sign language recognition system without preprocessing and hardware interface. We experimented with using compound words in continuous korean sign language which was input binary image with edge detection from camera. The recognition system of sign language without preprocessing got 93% recognition rate.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.184-193
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• 2012

In this paper, a 5-bit 2-GS/s 2-way time interleaved pipeline ADC for high-speed serial link receiver is demonstrated. Implemented as a current-mode amplifier, the stage ADC simultaneously processes the tracking and residue amplification to achieve higher sampling rate. In addition, each stage incorporates a built-in 1-tap FIR equalizer, reducing inter-symbol-interference (ISI）without an extra digital post-processing. The ADC is designed in a 110nm CMOS technology. It comsumes 91mW from a 1.2-V supply. The area excluding the memory block is $0.58{\times}0.42mm^2$. Simulation results show that when equalizer is enabled, the ADC achieves SNDR of 25.2dB and ENOB of 3.9bits at 2.0GS/s sample rate for a Nyquist input signal. When the equalizer is disengaged, SNDR is 26.0dB for 20MHz-1.0GHz input signal, and the ENOB of 4.0bits.