• 열처리공학회지
• /
• 제25권2호
• /
• pp.85-89
• /
• 2012

Transparent conductive ZnO/Ag/ZnO (ZAZ) multilayer films were deposited by Radio frequency (RF) magnetron sputtering and direct current (DC) magnetron sputtering. The effects of post deposition vacuum annealing temperature on the structural, electrical and optical properties of the ZAZ multilayer films were investigated. The thickness of ZAZ films is kept constant at ZnO 50 nm/Ag 5nm/ZnO 45 nm, while the vacuum annealing temperatures were varied from 200 and $400^{\circ}C$, respectively. As-deposited ZAZ films exhibit a sheet resistance of $6.1{\Omega}/{\Box}$ and optical transmittance of 72.7%. By increasing annealing temperature to $200^{\circ}C$, the resistivity decreased to as low as $5.3{\Omega}/{\Box}$ and optical transmittance also increased to as high as 82.1%. Post-deposition annealing of ZAZ multilayer films lead to considerably lower electrical resistivity and higher optical transparency, simultaneously by increased crystallization of the films.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 하계학술대회 논문집
• /
• pp.212-212
• /
• 2009

Thermoelectric devices were used to wide range of application. At present, increasing the efficiency of these devices, in particular, through the preparation of materials showing a high thermoelectric figure of merit, Z, $Bi_2Te_3$ and $Sb_2Te_3$ thin films on Si substrates are deposited by flash evaporation method for thermopile sensor applications. In order to enhance the thermoelectric properties of the thin film, annealing in high vacuum is carried out in the temperature range from 200 to $350^{\circ}C$. The microstructure of the film is investigated by XRD and SEM. The resistivity and Seebeck coefficient of the films are measured by Van der Pauw method and hot probe method respectively. At elevating annealing temperature, the crystallinity and thermoelectrical properties of films are improved by increasing the size of grains. At excessive high annealing temperatures, it is shown that Seebeck coefficient of films is decreased because of Te evaporation. By optimizing the annealing conditions, it is possible to obtain a high performance thin film with a thermoelectric properties.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2008년도 제34회 동계학술대회 초록집
• /
• pp.186-186
• /
• 2008

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
• /
• pp.703-706
• /
• 2004

This paper deals with the various sealing conditions in a vacuum and the discharge characteristics. The MgO thin film is prepared by e-beam evaporation method. Sealing process was performed in a vacuum at panel temperature of 430 $^{\circ}C$. We find the cracks on the MgO film surface, which results in higher discharge voltage and lower luminous efficiency. The vacuum in-line sealing technology does not require additional annealing process but induces the MgO cracks because of the high temperature sealing cycle in a vacuum. Therefore we modify the vacuum in-line sealing cycle which the MgO cracks are not found and the good characteristics of plasma displays are found in higher sealing pressure at sealing temperature of 430 $^{\circ}C$.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.292-292
• /
• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.

• 한국진공학회지
• /
• 제4권S2호
• /
• pp.115-130
• /
• 1995

In order to produce Cu nanocrystallite in silicon wafer, the implantation technique was used. The samples of silicon (100) wafers were implanted by $Cu^+$ ions at 100 keV and with varying the doses at room temperature. Post-annealing was performed at $800^{\circ}C$ with Ar environment. To investigate the formation of Cu nanocrystallite with ion doses and growth process by thermal annealing, SIMS and HRTEM(high resolution transmission electron microscopy)spectra were studied.

• 한국전기전자재료학회논문지
• /
• 제30권3호
• /
• pp.180-184
• /
• 2017

In this study, we examine the electrical properties of diketopyrrolopyrrole (DPP) containing polymer semiconductors that have been reported to show high performance with ambipolar characteristics. We prepared three different DPP based polymer semiconductors (PDPPTPT, PDPP3T, and PDPP2T-TT) and fabricated organic thin film transistors (OTFTs) with ambipolar polymer semiconductors as an active layer. All three DPP polymers showed only p-type properties at initial measurements. However, after annealing in vacuum oven for 24 hours, it was found that the DPP based polymers have both p-type and n-type properties. It is speculated that the residual impurities supposedly regarded as a strong electron trap source were eliminated during the vacuum process.

• Journal of Korean Vacuum Science & Technology
• /
• 제6권3호
• /
• pp.120-125
• /
• 2002

The aim of the present work is to optimized the annealing parameter in both front and back screen printed contacts realization on p-type multicrystalline silicon and with phosphorus diffused. The RTA treatments were carried out at various temperatures from 600 to 850$\^{C}$ and annealing time ranging from 3 min to 5 min in air, O$_2$and N$_2$ ambiance. The contacts parameters are obtained according to Transmission Line Model measurements. A good RTA cycle is obtained with a temperature plateau of 700$\^{C}$-750$\^{C}$ and annealing ambiance of air. Several processing parameters required for good cell efficiency are discussed with an emphasis placed on the critical role of the glass frit in the aluminum paste. A anamolus behaviour of Aluminum n-doping on p-type Si wafer, contact at high temperature have also been studied.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
• /
• pp.318.1-318.1
• /
• 2013

Nowadays Cu2ZnSnS4 (CZTS) solar cell is attracting a lot of attention as a strong alternative to CIGS solar cell due to nontoxic and inexpensive constituent elements of CZTS. From various processes for the fabrication of CZTS solar cell, solution-based deposition of CZTS thin films is well-known non-vacuum process and many researchers are focusing on this method because of large-area deposition, high-throughput, and efficient material usage. Typically the solution-based process consists of two steps, coating of precursor solution and annealing of the precursor thin films. Unlike vacuum-based deposition, precursor solution contains unnecessary elements except Cu, Zn, Sn, and S in order to form high quality precursor thin films, and thus the precise control of precursor thin film preparation is essential for achieving high efficient CZTS solar cells. In this work, we have investigated the effect of preparation condition of CZTS precursor thin films on the performance of CZTS solar cells. The composition of CZTS precursor solution was controlled for obtaining optimized chemical composition of CZTS absorber layers for high-efficiency solar cells. Pre-annealing process of the CZTS precursor thin films was also investigated to confirm the effect of thermal treatment on chemical composition and carbon residues of CZTS absorber layers. The change of the morphology of CZTS precursor thin film by the preparation condition was also observed.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
• /
• pp.290.2-290.2
• /
• 2016

Recently, organic thin-film transistors have been widely researched for organic light-emitting diode panels, memory devices, logic circuits for flexible display because of its virtue of mechanical flexibility, low fabrication cost, low process temperature, and large area production. In order to achieve high performance OTFTs, increase in accumulation carrier mobility is a critical factor. Post-fabrication thermal annealing process has been known as one of the methods to achieve this by improving the crystal quality of organic semiconductor materials In this paper, we researched the properties of pentacene films with X-Ray Diffraction (XRD) and Atomic Force Microscope (AFM) analyses as different annealing temperature in N2 ambient. Electrical characterization of the pentacene based thin film transistor was also conducted by transfer length method (TLM) with different annealing temperature in Al- and Ti-pentacene junctions to confirm the Fermi level pinning phenomenon. For Al- and Ti-pentacene junctions, is was found that as the surface quality of the pentacene films changed as annealing temperature increased, the hole-barrier height (h-BH) that were controlled by Fermi level pinning were effectively reduced.