• Journal of Power Electronics
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• v.4 no.1
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• pp.46-55
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• 2004

This paper presents a high-frequency ZVS-PWM boost chopper-fed DC-DC converter with a single active auxiliary edge resonant snubber in the load-side which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of ZVS-PWM boost chopper-fed DC-DC converter proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory, the temperature performance of IGBT module, the actual power conversion efficiency and the EMI of radiated and conducted emissions. And then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn off mode transition with the aid of an additional lossless clamping diode loop, and reduced the EMI conducted emission in this paper.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.163.2-163.2
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• 2010

In this work, nano-flake shaped nickel oxide (NiO) films were synthesized by chemical bath deposition technique for electrochemical capacitors. The deposition was carried out for 1 and 2 h at room temperature using nickel foam as the substrate and the current collector. The structure and morphology of prepared NiO film were characterized by X-ray diffraction (XRD) and scanning electron microscopy (SEM). And, electrochemical properties were characterized by cyclic voltammetry, galvanostatic charge-discharge, and AC impedence measurement. It was found that the NiO film was constructed by many interconnected NiO nano-flakes which arranged vertically to the substrate, forming a net-like structure with large pores. The open macropores may facilitate the electrolyte penetration and ion migration, resulted in the utilization of nickel oxide due to the increased surface area for electrochemical reactions. Furthermore, it was found that the deposition onto nickel foam as substrate and curent collector led to decrease of the ion transfer resistance so that its specific capacitance of a NiO film had high value than NiO nano flake powder.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.4
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• pp.538-542
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• 2018

In order to generate a clock source with low cost and high performance in system on chip(SoC), a relaxation oscillator with stable output characteristics according to PVT(process, voltage and temperature) fluctuation require a low area and a low power. In this paper, we propose a solution to reduce the current loss caused by parasitic components in the conventional relaxation oscillator. Since the slew rate of the bias current and the capacitor are adjusted to be the same through the proposed solution, a relaxation oscillator with low area characteristics is designed for the same clock source frequency implementation. The proposed circuit is designed using the TSMC CMOS 0.18um process. The Simulation results show that the relaxation oscillator using the proposed solution can prevent the current loss of about $279{\mu}A$ and reduce the total chip area by 20.8% compared with the conventional oscillator in the clock source frequency of 96 MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.6
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• pp.1128-1135
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• 2001

In this paper, a new HSG-Si formation technology, "seeding method', which employs Si$_2$H$_{6}$-molecule irradiation and annealing, was applied for realizing 64Mbit DRAMs. By using this technique, grain size controlled HSG-Si can be fabricated on in-situ phosphorous-doped amorphous-Si electrode. The new HSG-Si fabrication technology achieves twice the storage capacitance with high reliability for the stacked capacitors. In this technique, optimum process conditions of the phosphorous concentration, storage polysilicon deposition temperature and thickness of hemispherical grain silicon are in the range of 3.0-4.0E19atoms/㎤, 53$0^{\circ}C$ and 400$\AA$, respectively. In the 64M bit DRAM capacitor using optimum process conditions, limit thickness of dielectric nitride is about 65$\AA$.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2006.10a
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• pp.166-169
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• 2006

A promising capacitor, which has conformable step coverage and good uniformity of thickness and composition, is needed to manufacture high-density non-volatile FeRAM capacitors with a stacked cell structure. In this study, ferroelectric $Bi_{3.61}Nd_{0.39}Ti_3O_{12}$ (BNT) thin films were prepared on $Pt(111)/Ti/SiO_2/Si$ substrates by the liquid delivery system MOCVD method. In these experiments, $Bi(ph)_3$, $Nd(TMHD)_3$ and $Ti(O^iPr)_2(TMHD)_2$ were used as the precursors and were dissolved in n-butyl acetate. The BNT thin films were deposited at a substrate temperature and reactor pressure of approximately $600^{\circ}C$ and 4.8 Torr, respectively. The microstructure of the layered perovskite phase was observed by XRD and SEM. The remanent polarization value (2Pr) of the BNT thin film was $31.67\;{\mu}C/cm^2$ at an applied voltage of 5 V.

• ETRI Journal
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• v.31 no.3
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• pp.254-262
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• 2009

This paper presents a novel simple filter design method based on a parallel short-ended coupled-line structure with capacitive loading for size reduction and ultra-broad rejection of spurious passbands. In addition, the introduction of a cross-coupling capacitor into the miniaturized coupled-line can create a transmission zero at the second harmonic frequency for better frequency selectivity and attenuation level. The aperture compensation technique is also applied to achieve a strong coupling in the coupled-line section. The influence of using the connecting transmission line to cascade two identical one-stage filters is studied for the first time. Specifically, such a two-stage bandpass filter operating at 2.3 GHz with a fractional bandwidth of 10% was designed and realized with low-temperature co-fired ceramic technology for application in base stations that need high power handling capability. It achieved attenuation in excess of -40 dB up to $4f_0$ and low insertion loss of -1.2 dB with the size of 10 mm ${\times}$ 7 mm ${\times}$ 2.2 mm. The measured and simulated results showed good agreement.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.31-31
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• 2008

고주파 잡음 발생과 고집적화 문제 해결을 위해 고용량 디커플링 캐패시터를 기판에 내장하는 연구가 활발히 진행되고 있다. 본 연구에서는 초고주파 환경에서 고용량 기판 내장형 디커플링 캐패시터로의 응용을 위해 $BaTiO_3$박막을 에어로졸 데포지션 법을 이용하여 12~0.2 ${\mu}m$의 두께로 제조하였고 그 유전특성을 조사하였다. 그결과, 1 MHz에서 permittivity가 70, loss tangent은 3% 이하였으며, capacitance density는 $1{\mu}m$의 두께에서 59 nF/$cm^2$이었다. 하지만, 박막의 두께가 $1{\mu}m$ 이하에서는 XRD를 통해 결정성이 확인 되었음에도 큰 누설전류로 인해 유전특성을 확인할 수 없었다. 이 누설전류의 발생 원인을 조사하기 위해 $BaTiO_3$박막의 표면의 미세구조를 SEM으로 관찰한 결과 여러 결함들이 확인되었으며, 또한 전극 직경의 크기를 1.5 mm에서 0.33 mm로 작게 변화시킴으로서 그 유전특성을 조사하여 박막의 불균일성과 박막화의 가능성을 확인하였다.

• Journal of the Korean Ceramic Society
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• v.42 no.4
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• pp.219-223
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• 2005

A promising capacitor, which has conformable step coverage and good uniformity of thickness and composition, is needed to manufacture high-density non-volatile FeRAM capacitors with a stacked cell structure. In this study, ferroelectric $Bi_{3.61}Nd_{0.39}Ti_3O_{12}$ (BNdT) thin films were prepared on $Pt(111)/TiO_2/SiO_2/Si$ substrates by the liquid delivery system MOCVD method. In these experiments, $Bi(ph)_{3}$, $Nd(TMHD)\_{3}$ and $Ti(O^iPr)_{2}(TMHD)_{2}$ were used as the precursors and were dissolved in n-butyl acetate. The BNdT thin films were deposited at a substrate temperature and reactor pressure of approximately $600^{\circ}C$ and 4.8 Torr, respectively. The microstructure of the layered perovskite phase was observed by XRD and SEM. The remanent polarization value (2Pr) of the BNdT thin film was $31.67\;{\mu}C/cm^{2}$ at an applied voltage of 5 V.

• Electrical & Electronic Materials
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• v.10 no.10
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• pp.1029-1033
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• 1997

A prototype MFSFET using ferroelectric fluoride BaMgF$_4$as a gate insulator has been successfully fabricated with the help of 2 sheets of metal mask. The fluoride film was deposited in an ultrai-high vacuum system at a substrate temperature of below 30$0^{\circ}C$ and an in-situ post-deposition annealing was conducted for 20 seconds at $650^{\circ}C$ in the same chamber. The interface state density of the BaMgF$_4$/Si(100) interface calculated by a MFS capacitor fabricated on the same wafer was about 8$\times$10$^{10}$ /cm$^2$.eV. The I$_{D}$-V$_{G}$ characteristics of the MFSFET show a hysteresis loop due to the ferroelectric nature of the BaMgF$_4$film. It is also demonstrated that the I$_{D}$ can be controlled by the “write” plus which was applied before the measurements even at the same “read”gate voltage.ltage.

• The Korean Journal of Ceramics
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• v.2 no.2
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• pp.95-101
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• 1996

Variations of the leakage current behaviors and interface potential barrier $({\Phi}_B)$ of rf-sputter deposited (Ba, Sr)$TiO_3$ (BST) thin films with thicknesses ranging from 20 nm to 150nm are investigated as a function of the thickness and bias voltages. The top and bottom electrodes are dc-sputter-deposited Pt films. ${\Phi}_B$ critically depends on the BST film deposition temperature, postannealing atmosphere and time after the annealing. The postannealing under $N_2$ atmosphere results in a high interface potential barrier height and low leakage current. Maintaining the BST capacitor in air for a long time reduces the ${\Phi}_B$ from about 2.4 eV to 1.6 eV due to the oxidation. ${\Phi}_B$ is not so dependent on the film thickness in this experimental range. The leakage conduction mechanism is very dependent on the BST film thickness; the 20 nm thick film shows tunneling current, 30 and 40 nm thick films show Shottky emission current.