• Title/Summary/Keyword: High power module

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A Study on JFET and FLR Optimization for the Design and Fabrication of 3.3kV SiC MOSFET (3.3kV SiC MOSFET 설계 및 제작을 위한 JFET 및 FLR 최적화 연구)

  • YeHwan Kang;Hyunwoo Lee;Sang-Mo Koo
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.3
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    • pp.155-160
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    • 2023
  • The potential performance benefits of Silicon Carbide(SiC) MOSFETs in high power, high frequency power switching applications have been well established over the past 20 years. In the past few years, SiC MOSFET offerings have been announced by suppliers as die, discrete, module and system level products. In high-voltage SiC vertical devices, major design concerns is the edge termination and cell pitch design Field Limiting Rings(FLR) based structures are commonly used in the edge termination approaches. This study presents a comprehensive analysis of the impact of variation of FLR and JFET region on the performance of a 3.3 kV SiC MOSFET during. The improvement in MOSFET reverse bias by optimizing the field ring design and its influence on the nominal operating performance is evaluated. And, manufacturability of the optimization of the JFET region of the SiC MOSFET was also examined by investigating full-map electrical characteristics.

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Inductorless 8.9 mW 25 Gb/s 1:4 DEMUX and 4 mW 13 Gb/s 4:1 MUX in 90 nm CMOS

  • Sekiguchi, Takayuki;Amakawa, Shuhei;Ishihara, Noboru;Masu, Kazuya
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.176- 184
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    • 2010
  • A low-power inductorless 1:4 DEMUX and a 4:1 MUX for a 90 nm CMOS are presented. The DEMUX can be operated at a speed of 25 Gb/s with the power supply voltage of 1.05 V, and the power consumption is 8.9 mW. The area of the DEMUX core is $29\;{\times}\;40\;{\mu}m^2$. The operation speed of the 4:1 MUX is 13 Gb/s at a power supply voltage of 1.2 V, and the power consumption is 4 mW. The area of the MUX core is $30\;{\times}\;18\;{\mu}m^2$. The MUX/DEMUX mainly consists of differential pseudo-NMOS. In these MUX/DEMUX circuits, logic swing is nearly rail-to-rail, and a low $V_{dd}$. The component circuit is more scalable than a CML circuit, which is commonly used in a high-performance MUX/DEMUX. These MUX/DEMUX circuits are compatible with conventional CMOS logic circuit, and it can be directly connected to CMOS logic gates without logic level conversion. Furthermore, the circuits are useful for core-to-core interconnection in the system LSI or chip-to-chip communication within a multi-chip module, because of its low power, small footprint, and reasonable operation speed.

Low Power Security Architecture for the Internet of Things (사물인터넷을 위한 저전력 보안 아키텍쳐)

  • Yun, Sun-woo;Park, Na-eun;Lee, Il-gu
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.199-201
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    • 2021
  • The Internet of Things (IoT) is a technology that can organically connect people and things without time and space constraints by using communication network technology and sensors, and transmit and receive data in real time. The IoT used in all industrial fields has limitations in terms of storage allocation, such as device size, memory capacity, and data transmission performance, so it is important to manage power consumption to effectively utilize the limited battery capacity. In the prior research, there is a problem in that security is deteriorated instead of improving power efficiency by lightening the security algorithm of the encryption module. In this study, we proposes a low-power security architecture that can utilize high-performance security algorithms in the IoT environment. This can provide high security and power efficiency by using relatively complex security modules in low-power environments by executing security modules only when threat detection is required based on inspection results.

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A study on Computer-controlled Ultrasonic Scanning Device (컴퓨터제어에 의한 자동초음파 탐상장치에 관한 연구)

  • Huh, H.;Park, C.S.;Hong, S.S.;Park, J.H.
    • Journal of the Korean Society for Nondestructive Testing
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    • v.9 no.1
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    • pp.30-38
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    • 1989
  • Since the nuclear power plants in Korea have been operated in 1979, the nondestructive testing (NDT) of pressure vessels and/or piping welds plays an important role for maintaining the safety and integrity of the plants. Ultrasonic method is superior to the other NDT method in the viewpoint of the detectability of small flaw and accuracy to determine the locations, sizes, orientations, and shapes. As the service time of the nuclear power plants is increased, the radiation level from the components is getting higher. In order to get more quantitative and reliable results and secure the inspector from the exposure to high radiation level, automation of the ultrasonic equipments has been one of the important research and development(R & D) subject. In this research, it was attempted to visualize the shape of flaws presented inside the specimen using a Modified C-Scan technique. In order to develope Modified C-Scan technique, an automatic ultrasonic scanner and a module to control the scanner were designed and fabricated. IBM-PC/XT was interfaced to the module to control the scanner. Analog signals from the SONIC MARK II were digitized by Analog-Digital Converter(ADC 0800) for Modified C-Scan display. A computer program has been developed and has capability of automatic data acquisition and processing from the digital data, which consist of maximum amplitudes in each gate range and locations. The data from Modified C-Scan results was compared with shape from artificial defects using the developed system. Focal length of focused transducer was measured. The automatic ultrasonic equipment developed through this study is essential for more accurate, reliable, and repeatable ultrasonic experiments. If the scanner are modified to meet to appropriate purposes, it can be applied to automation of ultrasonic examination of nuclear power plants and helpful to the research on ultrasonic characterization of the materials.

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BUC Design and Fabrication for Flyaway Satellite Terminal (운반형 위성단말 고출력 상향 주파수변환기 설계 및 제작)

  • Kim, Joo-Yeon;Shin, Kwan-Ho
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.72-80
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    • 2020
  • This paper describes the design and fabrication of a BUC(Block Up-converter) which is a component of a FST (Flyaway Satellite Terminal), one of the ET(Earth Terminal) of the military satellite. BUC is physically composed of an up-converter module, a high power amplifier module, a receive band suppression filter, a housing, and a cable assembly. It was designed using simulator AWR to satisfy the electrical characteristics of BUC's such as maximum output power, gain, unwanted signal, and intermodulation. The maximum output power and gain characteristics were measured at 43.4dBm and 51.8dB, respectively. The unwanted wave and intermodulation characteristics were -73.5dBc and -31.9dBc, respectively. Of the electrical requirements of Table 1, not only the above four but also all of the items were confirmed to be satisfied.

On the Phase Variation and Implementation of If Module for WLL CDMA System (WLL용 CDMA 시스템 IF 모듈의 구현 및 위상 특성)

  • 강병권;김선형
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.1
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    • pp.219-226
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    • 2000
  • In this paper, we design and implement a IF(intermediate frequency) module for WLL(wireless local loop) CDMA(code division multiple access) basestation. The implemented IF transceiver is consists of transmitter, receiver and local oscillator. The considered signal bandwidth is 10 MHz and the local carrier frequency is 40 MHz. As test results, the If transmitter output power is -5dBm $\pm3dB$when the baseband input is -10dBm $\pm3dB$, and the IF receiver output power is -10dBm $\pm3dB$when the IF input is -5dBm $\pm3dB$. Also the AGC(automatic gain control) circuit has dynamic range of 9 dB from -7dBm to +2dBm with output power 2dBm. And the group delay characteristic is analyzed by comparing the phase delay from 1 MHz to 5 MHz and the phase distortion is very low. We can conclude that this IF system can be applied to high speed data rate communication system.

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Design interchangeable battery modules with spare cells for electrical propelled ship (전기추진선박에서 예비-셀을 이용한 자가 진단 기반의 배터리 관리 시스템 설계 및 구현)

  • Lee, Jong-Hak;Oh, Ji-Hyun;Oh, Jin-Seok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.5
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    • pp.709-718
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    • 2021
  • As regulations on environmental pollution of ships have been strengthened, interest in smart ships such as electric propulsion ships equipped with hybrid power systems is increasing. Since batteries used in electric propulsion ships have a larger capacity than batteries used in vehicles, the price is high and maintenance is considered important. The ship's battery is manufactured as an integral type and is managed by the battery management system, and the maintenance and repair of the battery is performed through the replacement of the battery. we design and implement a battery module and a control algorithm using pre-cell for easy battery management. In addition, a controller is designed to transmit the data necessary for the electric propulsion ship power system control to the power control system. When a battery to which the corresponding spare-cell is applied is used, the stability of the ship and the battery system is increased, and it can have an advantage in terms of maintenance and repair.

A design of radiation hardened common signal processing module for sensors in NPP (내방사선 원전센서 공통 신호처리 모듈 설계)

  • Lee, Nam-ho;Hwang, Young-gwan;Kim, Jong-yeol;Lee, Seung-min
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.6
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    • pp.1405-1410
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    • 2015
  • In this study we designed the radiation-hardened sensor signal processing modules that can be commonly used for a variety of sensors during normal operation and even in high-radiation environments caused by an accident. First development module was designed to receive the change of the R and C value from the sensors and to process the signal as a PWM modulation scheme. This module was assessed to have ± 10% error to the Full-Scale in the radiation test in the range of 12 kGy TID. The main cause of the error was analyzed as the annealing of the common circuit in the switching element and the consequent increase in the duty ratio of the pulse width modulation circuit according to the radiation dose increasement. The redesigned module for higher radiation resistivity with Stub transistor circuit was found to have less than 5% error to the Full-scale from the radiation test results for 20.7 kGy TID range.

Design of an Edge Computing System using a Raspberry Pi Module for Structural Response Measurement (구조물 응답측정을 위한 라즈베리파이를 이용한 엣지 컴퓨팅 시스템 설계)

  • Shin, Yoon-Soo;Kim, Junhee;Min, Kyung-Won
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.32 no.6
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    • pp.375-381
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    • 2019
  • Structural health monitoring to determine structural conditions at an early stage and to efficiently manage the energy requirements of buildings using systems that collects relevant data, is under active investigation. Structural monitoring requires cutting-edge technology in which construction, sensing, and ICT technologies are combined. However, the scope of application is limited because expensive sensors and specialized technical skills are often required. In this study, a Raspberry Pi module, one of the most widely used single board computers, a Lora module that is capable of long-distance communication at low power, and a high-performance accelerometer are used to construct a wireless edge computing system that can monitor building response over an extended time period. In addition, the Raspberry Pi module utilizes an edge computing algorithm, and only meaningful data is obtained from the vast amount of acceleration data acquired in real-time. The raw data acquired using Wi-Fi communication are compared to the Laura data to evaluate the accuracy of the data obtained using the system.

Implementation of High Speed Serial interface for testing LCD module by using the MDDI (MDDI방식 LCD모듈의 테스트하기 위한 고속직렬통신 인터페이스 구현)

  • Kim, Sang-Mok;Kang, Chang-Hun;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.212-214
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    • 2005
  • The MDDI(Mobile Digital Display Interface) standard is an optimized high-speed serial interconnection technology developed by Qualcomm and supports the VESA(Video Electronics Standard Association). It increases reliability and reduces power consumption in clamshell phones by decreasing the number of wires to interconnect with the LCD display. In this paper, the MDDI host is designed using VHDL and implemented on FPGA. We demonstrates that the MDDI host is connected with S3CA460 LCD controller is designed by Samsung Electronics Co. and display a steal image to the LCD.

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