• Journal of Advanced Marine Engineering and Technology
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• v.41 no.1
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• pp.76-82
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• 2017

Since the introduction of electronically controlled engines and electric propulsion ships, the need for an uninterruptible power supply for emergency power supply devices that use batteries has gained importance. The bidirectional converter in such emergency power supply devices is a crucial component. This paper proposes, a topology for an improved DC-DC bidirectional converter that is characterized by a high voltage conversion ratio and low voltage stress of switches. To confirm the performance of the converter, a computer simulation was executed with PSIM software. The conversion ratio of the proposed converter was found to be four times higher than the conventional boost converter in step-up mode and one-fourth that of the conventional buck converter in step-down mode, and the voltage stress of the switches was one-fourth of the high-side voltage. Moreover, the proposed converter was confirmed to be able to distribute equal currents between two interleaved modules without using any extra current-sharing control method because of the charge balance of its blocking capacitors.

• Journal of Power Electronics
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• v.5 no.3
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• pp.206-211
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• 2005

Conventional switched capacitor converters have an inherent drawback that their efficiency decreases as the output current increases. This inherent drawback is due to a periodical forced charging and discharging operation in the internal switched capacitors accompanied by a large capacitor current. Their efficiency can not be increased by decreasing its internal resistance. As a result, conventional switched capacitor converters have been limited to uses with a very small output current. To solve this problem we presented a novel switched capacitor converter topology that uses a resonant operation instead of the forced charging and discharging operation. Its advantage over a conventional switched capacitor converter is higher efficiency even in a high output current region. In this paper, the operation analysis and steady-state characteristics are described in detail for a half buck type switched capacitor converter, and they are confirmed by experimentation.

• Journal of Power Electronics
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• v.11 no.1
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• pp.59-63
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• 2011

This paper presents the modeling of the sampling effect in the p-type average current mode control. The prediction of the high frequency components near half of the switching frequency in the current loop gain is given for the p-type average current mode control. By the proposed model, the prediction accuracy is improved when compared to that of conventional models. The proposed method is applied to a buck converter, and then the measurement results are analyzed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.9
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• pp.47-56
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• 2012

This research is to develop satiable battery charger with a variety of capacity and voltage specifications of battery. For this, voltage or current were controlled through buck converter which is DC voltage that already received three-phase at primary side and passed bridge rectifier diode. And, it was comprised of full-bridge converter and HFTR for insulation and a square wave AC. The transformer primary side was comprised in series to divide certain charging current and the secondly side was comprised of 6 fixed transformers so that they can generate certain amount of power and various output voltage through relay parallel compound 6 DC Link outputs. To confirm such structure's verification and validity, simulation with PSIM was conducted, and validity of proposed variable charger system was verified through 3kW stack production.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.1-7
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• 2008

This paper proposes 3.3V input and 1.8V output voltage mode step-down DC-DC buck converter for wireless mobile system which is designed in a standard 0.35$\mu$m CMOS process. The proposed capacitor multiplier method can minimize error amplifier compensation block size by 30%. It allows the compensation block of DC-DC converter be easily integrated on a chip. Also, we improve efficiency to 3% using low power buffer. Measurement result shows that the circuit has less than 1.17% output ripple voltage and maximum 83.9% power efficiency.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.802-809
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• 2014

This paper presents a dual-mode bias modulator (BM) for complementary metal oxide semiconductor (CMOS) power amplifiers (PAs). The BM includes a hybrid buck converter and a normal buck converter for an envelope tracking (ET) mode for high output power and for an average power tracking (APT) mode for low output power, respectively. The dual-mode BM and CMOS PA are designed using a $0.18-{\mu}m$ CMOS process for the 1.75 GHz band. For the 16-QAM LTE signal with a peak-to-average power ratio of 7.3 dB and a bandwidth of 5 MHz, the PA with the ET mode exhibited a poweradded efficiency (PAE) of 39.2%, an EVM of 4.8%, a gain of 19.0 dB, and an adjacent channel leakage power ratio of -30 dBc at an average output power of 22 dBm, while the stand-alone PA has a PAE of 8% lower at the same condition. The PA with APT mode has a PAE of 21.3%, which is an improvement of 13.4% from that of the stand-alone PA at an output power of 13 dBm.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.9
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• pp.21-26
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• 2016

This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.181-190
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• 2019

Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

• Journal of Power Electronics
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• v.5 no.1
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• pp.55-61
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• 2005

A fuel cell (FC) system includes a fuel processor plus subsystems to manage air, water, and thermal energy, and electric power. The overall system is high-priced and needs peripheral devices. In this paper, a FC simulator is designed and constructed with the electrical characteristics of a fuel cell generation (FCG) system, using uses a simple buck converter to overcome these disadvantages. The characteristic voltage and current (V-I) curve for the FC simulator is controlled by a simplified linear function. In addition, to verify FCG system performance and operation, a full-bridge DC/DC converter and a single-phase DC/AC inverter were designed and constructed for FC applications. Close agreement between the simulation and experimental results confirms the validity and usefulness of the proposed FC simulator.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.232-233
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• 2012

This paper presents an effective control scheme for an electric vehicle battery charger where a symmetrical bridgeless power factor-corrected converter and a buck converter are cascaded. Both converters have been popular in industries because of their high efficiency, low cost, and compact size, hence combining these converters makes the overall battery charging system strongly efficient. Moreover, this charger topology can operate at universal input voltage and attain a desired battery current and voltage without ripple. In order to achieve a unity input power factor and zero input current harmonic distortion, the proposed control scheme adopts duty ratio feed-forward control technique in both current and voltage control loop. Additionally, in the current loop, its reference is created by a phase-locked loop (PLL) block, leading to a pure sinusoidal input current although the input voltage waveform is being distorted. The feasibility and practical value of the proposed approach are verified by simulation and experiment with an 110V/60Hz ac line input and 1.5kW-72V dc output of the battery charging system.