• ETRI Journal
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• v.41 no.4
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• pp.426-436
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• 2019

In time division duplex (TDD)-based multiuser massive multiple input multiple output (MIMO) systems, the uplink channel is estimated and the results are used in downlink for signal detection. Owing to noisy uplink channel estimation, the downlink channel should also be estimated for accurate signal detection. Therefore, recently, a blind method was developed, which assumes the use of a linear high-power amplifier (HPA) in the base station (BS). In this study, we extend this method to a scenario with a nonlinear HPA in the BS, where the Bussgang decomposition is used for HPA modeling. In the proposed method, the average power of the received signal for each user is a function of channel gain, large-scale fading, and nonlinear distortion variance. Therefore, the channel gain is estimated, which is required for signal detection. The performance of the proposed method is analyzed theoretically. The simulation results show superior performance of the proposed method compared to that of the other methods in the literature.

• International Journal of Advanced Culture Technology
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• v.11 no.1
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• pp.395-402
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• 2023

The implementation of a hybrid network utilizing Power Line Communication (PLC) and Wi-Fi technologies has been demonstrated to improve signal strength and coverage in areas with poor connectivity due to internet shadow areas. In this study we strategically positioned Wi-Fi relays and utilized the capabilities of PLC technology to significantly improve signal strength and coverage in areas with poor connectivity. We also analyzed the effects of metallic obstacles on Wi-Fi signal propagation and proposed a solution to strengthen the signal enough to pass through them. Our experiment demonstrated the feasibility and potential of using this hybrid network in industrial scenarios for real-time data transmission. Overall, the results suggest that the use of PLC and Wi-Fi hybrid networks can be a cost-effective and efficient solution for overcoming internet connectivity challenges and has the potential to provide high-speed internet access to areas with unreliable signals.

• ETRI Journal
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• v.36 no.3
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• pp.498-501
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• 2014

A C-band 50 W high-power microwave monolithic integrated circuit amplifier for use in a phased-array radar system was designed and fabricated using commercial $0.25{\mu}m$ AlGaN/GaN technology. This two-stage amplifier can achieve a saturated output power of 50 W with higher than 35% power-added efficiency and 22 dB small-signal gain over a frequency range of 5.5 GHz to 6.2 GHz. With a compact $14.82mm^2$ chip area, an output power density of $3.2W/mm^2$ is demonstrated.

• Journal of Power Electronics
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• v.11 no.4
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• pp.551-560
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• 2011

This paper proposes a grid-tied power conditioning system for the fuel cell power generation, which consists of a 2-stage DC-DC converter and a 3-phase PWM inverter. The 2-stage DC-DC converter boosts the fuel cell stack voltage of 26-48V up to 400V, using a hard-switching boost converter and a high-frequency unregulated LLC resonant converter. The operation of the proposed power conditioning system was verified through simulations with PSCAD/EMTDC software. Based on the simulation results, a laboratory experimental set-up was built with a 1.2kW PEM fuel-cell stack to verify the feasibility of hardware implementation. The developed power conditioning system shows a high efficiency of 91%, which is a very positive result for the commercialization.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.114-117
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• 2002

The airborne tracking radar is located in front of aircraft or missile and measures and tracks a target motion. The signal processor receives target signals from a receiver using A/D converters, and calculates the target motion, and transfers the data to the aircraft or missile control unit. Since the signal processing system is required to be lightweight and small size as well as high performance to calculate and analyze the received signal, we use high speed DSPs and SMD type components having low power consumption. In this paper, we describe the design concept of signal processing system of the airborne tracking radar.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1205-1214
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• 2013

Recently spaceborne SAR systems are increasing image resolution and frequency. As a high quality image resolution, the wider bandwidth is required and a wideband signal generator with RF component is very complicated and RF impairments of device is increased. Therefore, it is very important to improve performance by reducing these errors. In this study, the transmission signal of the wideband signal generator is applied to the phase noise, IQ imbalance, ripple gain, nonlinear model of high power amplifier. And we define possible structures of wideband signal generator and measure the PSLR and ISLR for the performance assesment. Also, we extract error of the amplitude and phase from the waveform and use a quadratic polynomial curve fitting and examine the performance change due to nonlinear device. Finally, we apply a high power amplifier predistortion method for non-linear error compensation. And we confirm that distortion in the output of the amplifier by intermodulation component is decreased by 15 dB.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.779-782
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• 1998

This paper describes a high-speed Dual-modulus Prescaler (DMP) for RF mobile communication systems with pulse remover using selective latch technique. This circuit achieves high speed and low power consumption by reducing full speed flip-flops and using a selective latch. The proposed DMP consists of only one full speed flip-flop, a selective latch, conventional flip-flops, and a control gate. In order to ensure the timing of control signal, duty cycle problem and propagation delay must be considered. The failling edgetriggered flip-flops alleviate the duty cycle problem andthis paper shows that the propagation delay of control signal doesn't matter. The maximum operating frequency of the proposed DMP with 0.6um CMOS technology is up to 2.2㎓ at 3.3V power supply and the circuit consumes 5.24mA.

• Journal of Power Electronics
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• v.9 no.3
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• pp.410-417
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• 2009

This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.534-537
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• 1998

In this paper, a set of novel self-timed latches are introduced and analyzed. These latches have no back-to-back connection as in conventional self-timed latch, and both inverting and noninerting outputs are evaluated simultaneously leading to thigher oepating frequencies. Power consumption of these latches ar ealso comparable to or less than that of conventional circuits. Novel type of cross-coupled inverter used in the proosed circuits implements static operatin without signal fighting with the main driver during signal transition. Proposed latches ar tested using a 0.6.mu.m triple-poly triple-metal n-well CMOS technology. The resutls indicates that proposed active-low sefl-timed latch (ALSTL) improves speed by 14-34% over conventional NAND SR latch, while in active-high self-timed latch (AHSTL) the improvements are 15-35% with less power as compared with corresponding NORA SR latch. These novel latches have been successfully implemented in a high-speed synchronous DRAM (SDRAM).

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2014.10a
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• pp.922-924
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• 2014

This paper is concerned with the analysis of natural vibration characteristics of an accelerometer used in power plant. The malfunction of the accelerometer in high-temperature environment may produce erroneous sensor signal and the erroneous signal may cause unpredicted accidents in power plants. Hence, the accelerometer which endures high temperature needs to be developed. In this study, the natural vibration characteristics of the accelerometer were investigated prior to the development of the high-temperature accelerometer. The main mechanical part of the accelerometer is a spiral spring. In this study, the dynamic characteristics of the spiral spring were investigated first by using a commercial finite element code. Numerical results show that the thickness of the spiral spring affects the dynamic characteristics. Numerical investigation on the effect of temperature on the performance of the accelerometer will follow.