• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.12
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• pp.1678-1687
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• 2013

This paper describes a prototype of 3-phase 3.3kV/220V 6kVA modular semiconductor transformer developed in the lab for feasibility study. The developed prototype is composed of three single-phase units coupled in Y-connection. Each single-phase unit with a rating of 1.9kV/127V 2kVA consists of a high-voltage high-frequency resonant AC-DC converter, a low-voltage hybrid-switching DC-DC converter, and a low-voltage hybrid-switching DC-AC converter. Also each single-phase unit has two DSP controllers to control converter operation and to acquire monitoring data. Monitoring system was developed based on LabView by using CAN communication link between the DSP controller and PC. Through various experimental analyses it was verified that the prototype operates with proper performance under normal and sag condition. The system efficiency can be improved by adopting optimal design and replacing the IGBT switch with the SiC MOSFET switch. The developed prototype confirms a possibility to build a commercial high-voltage high-power semiconductor transformer by increasing the number of series-connected converter modules in high-voltage side and improving the performance of switching element.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1315-1324
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• 2018

A novel three-phase four-wire inverter topology is presented in this paper. This topology is equipped with a special capacitor balance grid without magnetic saturation. In response to unbalanced load and unequal split DC-link capacitors problems, a qusi-full-bridge DC/DC topology is applied in the balance grid. By using a high-frequency transformer, the energy transfer within the two split dc-link capacitors is realized. The novel topology makes the voltage across two split dc-link capacitors balanced so that the neutral point voltage ripple is inhibited. Under the condition of a stable neutral point voltage, the three-phase four-wire inverter can be equivalent to three independent single phase inverters. As a result, the three-phase inverter can produce symmetrical voltage waves with an unbalanced load. To avoid forward transformer magnetic saturation, the voltages of the primary and secondary windings are controlled to reverse once during each switching period. Furthermore, an improved mode chosen operating principle for this novel topology is designed and analyzed in detail. The simulated results verified the feasibility of this topology and an experimental inverter has been built to test the power quality produced by this topology. Finally, simulation results verify that the novel topology can effectively improve the inhibition of an inverter with a three-phase unbalanced load while decreasing the value of the split capacitor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.12
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• pp.2387-2394
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• 2016

It is important to select the most appropriate channel for efficient transmission of massive data in wireless sensor network. In the fixed channel method for wireless sensor node, shortage of frequency may be a major constraint to support a variety of environments. In this paper, the method that seeks common channels between two nodes without common control channels in the existing wireless cognitive radio network is introduced in order to use efficiently the channel of wireless sensor network. The problem of existing method shows the severe degradation of performance that is caused by interference of linkage between selected channels, so that the sequential algorithm is suggested to improve the performance. From the results of computer simulation, the suggested method shows that the link can be set 50% faster than the other methods as the number of links increases because the beacon packet waiting time caused by the interference decreases remarkably.

• Journal of Mechanical Science and Technology
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• v.17 no.7
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• pp.999-1010
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• 2003

Uninterrupted power supply has become indispensable during the maintenance task of active electric power lines as a result of today's highly information-oriented society and increasing demand of electric utilities. This maintenance task has the risk of electric shock and the danger of falling from high place. Therefore it is necessary to realize an autonomous robot system using electro-hydraulic manipulators because hydraulic manipulators have the advantage of electric insulation and power/mass density. Meanwhile an electro-hydraulic manipulator using hydraulic actuators has many nonlinear elements, and its parameter fluctuations are greater than those of an electrically driven manipulator. So it is relatively difficult to realize not only stable contact work but also accurate force control for the autonomous assembly tasks using hydraulic manipulators. In this paper, the robust force control of a 6-link electro-hydraulic manipulator system used in the real maintenance task of active electric lines is examined in detail. A nominal model for the system is obtained from experimental frequency responses of the system, and the deviation of the manipulator system from the nominal model is derived by a multiplicative uncertainty. Robust disturbance observers for force control are designed using this information in an H$\_$$\infty$/ framework, and implemented on the two different setups. Experimental results show that highly robust force tracking by a 6-link electro-hydraulic manipulator could be achieved even if the stiffness of environment and the shape of wall change.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.9
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• pp.868-882
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• 2009

In this paper, channel model and wireless link performance analysis for the short-range wireless communication system applications in the terahertz frequency which is currently interested in many countries will be described. In order to realize high data rates above 10 Gbps, the more wide bandwidths will be required than the currently available bandwidths of millimeter-wave frequencies, therefore, the carrier frequencies will be pushed to THz range to obtain larger bandwidths. From the THz atmospheric propagation characteristics based on ITU-R P.676-7, the available bandwidths were calculated to be 68, 48 and 45 GHz at the center frequencies of 220, 300 and 350 GHz, respectively. With these larger bandwidths, it was shown from the simulation that higher data rate above 10 Gbps can be achieved using lower order modulation schemes which have spectral efficiency of below 1. The indoor propagation delay spread characteristics were analyzed using a simplified PDP model with respect to building materials. The RMS delay spread was calculated to be 9.23 ns in a room size of $6\;m(L){\times}5\;m(W){\times}2.5\;m(H)$ for the concrete plaster with TE polarization, which is a similar result of below 10 ns from the Ray-Tracing simulation in the reference paper. The indoor wireless link performance analysis results showed that receiver sensitivity was $-56{\sim}-46\;dBm$ over bandwidth of $5{\sim}50\;GHz$ and antenna gain was calculated to be $26.6{\sim}31.6\;dBi$ at link distance of 10m under the BPSK modulation scheme. The maximum achievable data rates were estimated to be 30, 16 and 12 Gbps at the carrier frequencies of 220, 300 and 350 GHz, respectively, under the A WGN and LOS conditions, where it was assumed that the output power of the transmitter is -15 dBm and link distance of 1 m with BER of $10^{-12}$. If the output power of transmitter is increased, the more higher data rate can be achieved than the above results.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.773-778
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• 2001

This paper describes the implementation of the vector control schemes for a variable-speed 131kW PMSM (Permanent Magnet Synchronous Motor) in super-high speed application. The vector control with synchronous reference frame current regulator has been implemented with the challenging requirements such as the extremely low stator inductance$(28^{\mu}H)$, the high dc link voltage(600V) and the high excitation frequency(1.2kHz). Because the conventional position sensor is not reliable in super-high speed, a vector control scheme without any position sensor has been proposed. The proposed sensorless algorithm is implemented by processing the output voltage of the PI current regulator, and hence the structure is simple and the estimated speed is robust to the measurement noise. The experimental system has been built and the proposed control has been implemented and evaluated. The test result, up to the speed of 60,000 r/min, shows the validity of the proposed control.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.416-419
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• 1995

An analysis of a new load resonant inverter considering stray inductance is given. There are several different types for load resonant inverters. They can offer zero turn-on as well as zero turn-off switching losses, yielding high efficiency at high power and high frequencies. However, they didn't consider the influences of stray inductance. In conventional topology using lossless snubber capacitor, stray inductances result in very high frequency resonant current. Especially, these influences can be problematic in high power system such as induction heating system with large current of some 10A associated with it. These currents increase EMI problem, give harmful effects in gate driver's operation and increase loss of dc-link capacitor as well as snubber capacitor. Therefore, the effect of stray inductances should be treated and reduced. This paper presents a new load resonant inverter topology, which can reduce the effect of stray inductances.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.12
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• pp.1315-1320
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• 2015

In this paper Communication data link equipment on a high speed-hopping method to use the frequency resources efficiently for the frequency environment is introduced such as sensing techniques, using the same frequency band by using the received two-channel technique and the receive filter bank unit applied to be shared with other equipment such as radar and so on. The real-time measurement and analysis were operated for measurement the frequency environment of the operating band in advance. and primarily equipment to develop is analyzed how the interference effect to the radar minimize the operation of radar equipment. In reverse, to use the same frequency band the methods such as frequency sharing techniques are presented in this paper. Finally, by design of the main items of the RF transceiver NF, transmission output, and a simulation of the IMD, such as whether the key is verified prior to meet specifications.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.165-168
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• 2002

As the demand for higher data-rate chip-to-chip communication such as memory-to-controller, processor-to-processor increases, low cost high-speed serial links\ulcorner become more attractive. This paper describes a 0.25-fm CMOS 1.6Gbps/pin 4-level transceiver using Stub Series Terminated Logic for high Bandwidth. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by channel low pass effects, process-limited on-chip clock frequency, and serial link distance. The proposed transceiver uses multi-level signaling (4-level Pulse Amplitude Modulation) using push-pull type, double data rate and flash sampling. To reduce Process-Voltage-Temperature Variation and ISI including data dependency skew, the proposed high-speed calibration circuits with voltage swing controller, data linearity controller and slew rate controller maintains desirable output waveform and makes less sensitive output. In order to detect successfully the transmitted 1.6Gbps/pin 4-level data, the receiver is designed as simultaneous type with a kick - back noise-isolated reference voltage line structure and a 3-stage Gate-Isolated sense amplifier. The transceiver, which was fabricated using a 0.25 fm CMOS process, performs data rate of 1.6 ~ 2.0 Gbps/pin with a 400MHB internal clock, Stub Series Terminated Logic ever in 2.25 ~ 2.75V supply voltage. and occupied 500 * 6001m of area.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.791-794
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• 2003

The increasing computational capability of processors is driving the need for high bandwidth links to communicate and store the information that is processed. Such links are often an important part of multi processor interconnection, processor-to-memory interfaces and Serial-network interfaces. This paper describes a 0.11-${\mu}{\textrm}{m}$ CMOS 4 Gbp s/pin 3-Level transceiver using RSL/(Rambus Signaling Logic) for high bandwidth. This system which uses a high-gain windowed integrating receiver with wide common-mode range which was designed in order to improve SNR when operating with the smaller input overdrive of 3-Level. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by low pass effects of channel, process-limited on-chip clock frequency, and serial link distance. In order to detect the transmited 4Gbps/pin with 3-Level data sucessfully ,the receiver is designed using 3-stage sense amplifier. The proposed transceiver employes multi-level signaling (3-Level Pulse Amplitude Modulation) using clock multi phase, double data rate and Prbs patten generator. The transceiver shows data rate of 3.2 ~ 4.0 Gbps/pin with a 1GHz internal clock.