• Journal of Institute of Control, Robotics and Systems
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• v.20 no.7
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• pp.756-759
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• 2014

DC/DC converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. The converters can be applied in the regenerative braking of DC motors to return energy back to the supply, resulting in energy savings for the systems at periodic intervals. The fundamental converter studied here consists of an IGBT (Insulated Gate Bipolar mode Transistor), an inductor, a capacitor, a diode, a PWM-IC (Pulse Width Modulation Integrated Circuit) controller with oscillator, amplifier, and comparator. The PWM-IC is a core element and delivers the switching waveform to the gate of the IGBT in a stable manner. Display of the DC/DC converter output depends on the IGBT's changes in the threshold voltage and PWM-IC's pulse width. The simulation was conducted by PSIM software, and the hardware of the DC/DC converter was also implemented. It is necessary to study the fact that the output voltage depends on the duty rate of D, and to compare the output of experimental result with the theory and the simulation.

• International journal of advanced smart convergence
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• v.9 no.1
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.196-197
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• 2010

NAND형 charge trap flash (CTF) non-volatile memory (NVM) 소자가 30nm node 이하로 고집적화 되면서, 기존의 SONOS형 CTF NVM의 tunnel barrier로 쓰이는 SiO2는 direct tunneling과 stress induced leakage current (SILC)등의 효과로 인해 data retention의 감소 등 물리적인 한계에 이르렀다. 이에 따라 개선된 retention과 빠른 쓰기/지우기 속도를 만족시키기 위해서 tunnel barrier engineering (TBE)가 제안되었다. TBE NVM은 tunnel layer의 전위장벽을 엔지니어드함으로써 낮은 전압에서 전계의 민감도를 향상 시켜 동일한 두께의 단일 SiO2 터널베리어 보다 빠른 쓰기/지우기 속도를 확보할 수 있다. 또한 최근에 각광받는 high-k 물질을 TBE NVM에 적용시키는 연구가 활발히 진행 중이다. 본 연구에서는 Si3N4와 HfAlO (HfO2 : Al2O3 = 1:3)을 적층시켜 staggered의 새로운 구조의 tunnel barrier Capacitor를 제작하여 전기적 특성을 후속 열처리 온도와 방법에 따라 평가하였다. 실험은 n-type Si (100) wafer를 RCA 클리닝 실시한 후 Low pressure chemical vapor deposition (LPCVD)를 이용하여 Si3N4 3 nm 증착 후, Atomic layer deposition (ALD)를 이용하여 HfAlO를 3 nm 증착하였다. 게이트 전극은 e-beam evaporation을 이용하여 Al를 150 nm 증착하였다. 후속 열처리는 수소가 2% 함유된 질소 분위기에서 $300^{\circ}C$와 $450^{\circ}C$에서 Forming gas annealing (FGA) 실시하였고 질소 분위기에서 $600^{\circ}C{\sim}1000^{\circ}C$까지 Rapid thermal annealing (RTA)을 각각 실시하였다. 전기적 특성 분석은 후속 열처리 공정의 온도와 열처리 방법에 따라 Current-voltage와 Capacitance-voltage 특성을 조사하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.255-260
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• 2016

In this paper, a full-wave rectifier (FWR) with a simple vibration detector suitable for use with vibrational energy harvesting systems is presented. Conventional active FWRs where active diodes are used to reduce the diode voltage drop and increase the system efficiency are usually powered from the output. Output-powered FWRs exhibit relatively high efficiencies because the comparators used in active diodes are powered from the stable output voltage. Nevertheless, a major drawback is that these FWRs consume power from the output storage capacitor even when the system is not harvesting any energy. To overcome the problem, a technique using a simple vibration detector consisting of a peak detector and a level converter is proposed. The vibration detector detects whether vibrational energy exists or not in the input terminal and disables the comparators when there is no vibrational energy. The proposed FWR with the vibration detector is designed using a $0.35-{\mu}m$ CMOS process. Simulation results have verified the effectiveness of the proposed scheme. By using the proposed vibration detector, a decrease in leakage current by approximately 67,000 times can be achieved after the vibration disappears.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.64-73
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• 2001

This paper presents a Zero Voltage and Zero Current Switching (ZVZCS) 3-Level DC/DC converter. This converter overcomes the drawbacks presented by the conventional Zero Voltage Switching(ZVS) 3-Level converter, such as high circulating energy, severe parastic ringing on the rectifier diodes, and limited ZVS load range for the inner switches. The converter presented in this paper uses a phase shift control with a flying capacitor in the primary side to achieve ZVS for the outer switches. Additionally, the converter uses an energy recovery snubber to reset the primary current during the free-wheeling stage to achieve ZCS for the inner switches. The proposed converters are analyzed and verified on 6kW, 39kHz experimental prototype.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.6
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• pp.466-476
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• 2010

In this paper, for the notebook adapter with power level below approximately 60W, a novel LLC resonant converter preceded by diode rectifier with a capacitor filter is presented. Due to the switching operation of the auxiliary switching device, the proposed LLC resonant converter can deliver power with the high efficiency characteristics from the universal line(110VAC/220VAC) and load conditions. The operating schemes on the proposed converter are analyzed and described. A 60W prototype product is built, tested and verified.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.140-149
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• 2017

This study proposes a new type of active-clamp forward-flyback converter with two transformers that operate in forward and flyback modes during on and off times, respectively, instead of not using an output inductor. The main switch can be turned on with zero-voltage switching (ZVS) using the leakage inductance of the transformer and the output capacitor of the main switch. The leakage inductance should be increased to ZVS. However, the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches results in a serious voltage spike. A forward-flyback converter employing auxiliary inductor and auxiliary diode is proposed to overcome the problem. The operational principles are analyzed in detail and validated through experiments with a 385 V-to-53 V/37 A prototype.

• Journal of the Korean Society for Railway
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• v.19 no.3
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• pp.297-303
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• 2016

This paper introduces auxiliary power supply systems (APS) for railroad applications and proposes a new power conversion structure for highly-efficient and lightweight APS systems. The proposed structure focuses on an improvement of the power density in APS. It eliminates unnecessary power conversion stages in the conventional APS structure by modulating the dc/dc converter circuit and the structure of the system. The dc/dc converter circuit used in the proposed structure is based on a multi-level half-bridge converter, a widely used topology in railroad APS applications; a flying capacitor is newly added to the conventional circuit. The added capacitor is used not only to enhance the soft switching condition of the switches, but also so that the new pantograph will have a side voltage source of a battery charger in the APS structure. Since the battery charger uses the pantograph side voltage source in the proposed structure, rather than using the output of the main dc/dc converter in the conventional structure, the size and efficiency of the main dc/dc converter are reduced and increased, respectively. To verify the effectiveness of the proposed structure, simulation results will be presented with metropolitan transit APS specifications.

• Carbon letters
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• v.22
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• pp.70-80
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• 2017

Activated carbons (ACs) have been used as electrode materials of electric double-layer capacitors (EDLC) due to their high specific surface areas (SSA), stability, and ecological advantages. In order to make high-energy-density ACs for EDLC, petroleum pitch (PP) pre-carbonized at $500-1000^{\circ}C$ in $N_2$ gas for 1 h was used as the electrode material of the EDLC after KOH activation. As the pre-carbonization temperature increased, the SSA, pore volume and gravimetric capacitance tended to decrease, but the crystallinity and electrode density tended to increase, showing a maximum volumetric capacitance at a medium carbonization temperature. Therefore, it was possible to control the crystalline structure, SSA, and pore structure of AC by changing the pre-carbonization temperature. Because the electrode density increased with increasing of the pre-carbonization temperature, the highest volumetric capacitance of 28.4 F/cc was obtained from the PP pre-carbonized at $700^{\circ}C$, exhibiting a value over 150% of that of a commercial AC (MSP-20) for EDLC. Electrochemical activation was observed from the electrodes of PP as they were pre-carbonized at high temperatures above $700^{\circ}C$ and then activated by KOH. This process was found to have a significant effect on the specific capacitance and it was demonstrated that the higher charging voltage of EDLC was, the greater the electrochemical activation effect was.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.1
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• pp.44-50
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• 2015

This paper presents a high speed synchronous single inductor dual output boost converter using Type-III compensation for power management in smart devices. Maintaining multiple outputs from a single inductor is becoming very important because of inductor the sizes. The uses of high switching frequency, inductor and capacitor sizes are reduced. Owing to synchronous rectification this kind of converter is suitable for SoC. The phase is controlled in time sharing manner for each output. The controller used here is Type-III, which ensures quick settling time and high stability. The outputs are stable within $58{\mu}s$. The simulation results show that the proposed scheme achieves a better overall performance. The input voltage is 1.8V, switching frequency is 5MHz, and the inductor used is 600nH. The output voltages and powers are 2.6V& 3.3V and 147mW &, 230mW respectively.