• 제목/요약/키워드: High Power semiconductor

검색결과 968건 처리시간 0.023초

태양광 패널의 최대 전력 발생 시스템을 위한 DC OPTIMIZER 설계 (Design of DC OPTIMIZER for Maximum Power Generation System of Solar Panel)

  • 김정규;양오
    • 반도체디스플레이기술학회지
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    • 제17권1호
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    • pp.40-44
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    • 2018
  • In this paper, the efficiency of the solar system is lowered due to the partial shading such as the environmental factors of the solar panel. In order to solve this problem, a DC OPTIMIZER is proposed for a maximum power generation system of a photovoltaic panel. The proposed DC OPTIMIZER is composed of a buck structure that performs the maximum power point tracking (MPPT) control of each module of the solar panel, thus maximizing the efficiency. In order to verify the proposed DC Optimizer, the efficiency was measured by varying the irradiance using a solar simulator instead of the solar panel. As a result, it showed high efficiency characteristics as the maximum energy conversion efficiency was 99.3% at $800w/m^2$, $900w/m^2$, and the average efficiency was 99.06% excluding $100w/m^2$. The maximum efficiency of MPPT was 99.97% at $200w/m^2$, efficiency showed excellent performance.

반도체 플라즈마 용융장치용 고출력 능동 클램프 ZVS 플라이백 컨버터 설계에 관한 연구 (A Study on the Design of the High Power Active Clamp ZVS Flyback Converter for Semiconductor Plasma Etching System)

  • 이우석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2000년도 전력전자학술대회 논문집
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    • pp.400-403
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    • 2000
  • This paper deals with the active clamp ZVS flyback converter for semiconductor plasma etching system. The proposed converter has the characteristics of the good power facter low switching noise and efficiency improvement. The characteristics are verified through simulation results. Furthermore the ringing effect due to output capacitance of the main switch can be eliminated by use of active clamp circuit.

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Novel Control Range Compensation Method in Power Factor Correction Circuit

  • Park, Youngbae;Cho, Donghye
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 전력전자학술대회 논문집
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    • pp.224-225
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    • 2012
  • When Power Factor Correction(PFC) boost converter is designed for the universal input range, unwanted burst operation can be found at high line and light load. This operation may cause an audible noise from the boost inductor or sensitive flicker for human eye can be found in case of the display application. In order to solve this difficulty, this paper proposes the new control range compensation method and shows the effectiveness than the conventional method thru the experimental result.

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고전압 전력소자를 보호하기 위한 센스펫 설계방법 (A Design Method on Power Sensefet to Protect High Voltage Power Device)

  • 경신수;서준호;김요한;이종석;강이구;성만영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.6-7
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    • 2008
  • Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The sense FET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 450V power MOSFET devices by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}cm^{-3}$, size of $600{\mu}m^2$ with 4.5 $\Omega$, and off-state leakage current below 50 ${\mu}A$. We offer the layout of the proposed sense FET to process actually. The offerd design and optimization methods is meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

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반도체용 PCB 기판시스템의 구조해석 (Structural Analysis of a PCB Substrate System for Semiconductor)

  • 임경화;양손;윤종국;김영균;유선중
    • 반도체디스플레이기술학회지
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    • 제10권4호
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    • pp.113-118
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    • 2011
  • According to the high accuracy of semiconductor equipments, PCB substrate with much thin thickness is required. However, it is very difficult to sustain the PCB substrate without deformation in case of horizontal installation, due to low bending stiffness. In this research, new PCB process equipment with vertical installation has been developed in order to solve the problem of PCB substrate damage during etching process. As the main parts of etching system on PCB substrate, PCB substrate and JIG are analyzed through finite element method and experimental test. Through the analysis results of stress state, we could find the optimal JIG design to make the damage as low as possible.

유전알고리즘을 이용한 반도체식 가스센서 최적 필터 설계 (Optimal filter design at the semiconductor gas sensor by using genetic algorithm)

  • 공정식
    • Design & Manufacturing
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    • 제16권1호
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    • pp.15-20
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    • 2022
  • This paper is about elimination the situation in which gas sensor data becomes inaccurate due to temperature control when a semiconductor gas sensor is driven. Recently, interest in semiconductor gas sensors is high because semiconductor sensors can be driven with small and low power. Although semiconductor-type gas sensors have various advantages, there is a problem that they must operate at high temperatures. First temperature control was configured to adjust the temperature value of the heater mounted on the gas sensor. At that time, in controlling the heater temperature, gas sensor data are fluctuated despite supplying same gas concentration according to the temperature controlled. To resolve this problem, gas and temperature are extracted as a data. And then, a relation function is constructed between gas and temperature data. At this time, it is included low pass filter to get the stable data. In this paper, we can find optimal gain and parameters between gas and temperature data by using genetic algorithm.

4H-SiC와 산화막 계면에 대한 혼합된 일산화질소 가스를 이용한 산화 후속 열처리 효과 (Effect of High-Temperature Post-Oxidation Annealing in Diluted Nitric Oxide Gas on the SiO2/4H-SiC Interface)

  • 김인규;문정현
    • 한국전기전자재료학회논문지
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    • 제37권1호
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    • pp.101-105
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    • 2024
  • 4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (Ron,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (Dit) at the SiO2/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO2/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N2 diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N2 gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO2/4H-SiC interface, thereby reducing the Dit.

전력용 트랜지스터의 직렬연결시 스윗칭 특성 (The Switching Characteristics of Series-Connected Power Transistors)

  • 서범석;이택기;현동석
    • 대한전기학회논문지
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    • 제41권6호
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    • pp.600-606
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    • 1992
  • The series connection of power switching semiconductor elements is essential when a high voltage converter is made, so researches are being conducted to further develop this technology. In the series connection of power switching semiconductor elements, the main problem is that simultaneous conduction at turn-on and simultaneous blocking at turn-off together with voltage balancing are unattainable because of the difference of their switching characteristics. In this paper a novel series connection algorithm is proposed, which can implement not only the synchronization of the points of turn-on and turn-off time but the dynamic voltage balancing in spite of the difference of each switching characteristics. The proposed method is that the compensated control signal is attained from the voltage feedback signal and applied to the series-connected power transistors independently. Computer simulation and experimental results verify its validity.

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HVDC용 사이리스터 소자의 전기적 특성 simulation 연구 (Electrical characteristics simulation of thyristor devices for HVDC transmission)

  • 김상철;서길수;김은동
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 C
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    • pp.1559-1561
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    • 2003
  • In northeast Asia, there will be several important HVDC transmission lines to be established in Korea and China for perspective electric network market. 5500V 4-inches High voltage thyristor can be used in the DC transmission and distribution of electric power system. In this application, many thyristors are connected in series for each thyristor valves. Therefore, the required low reverse-recovery charge QRR and low on-state voltage drop $V_{TM}$ for such thyristor is necessary to this application. In our work, the on-state and off-state voltage performance was simulated by commercial simulation software.

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High Performance Current Sensing Circuit for Current-Mode DC-DC Buck Converter

  • Jin, Hai-Feng;Piao, Hua-Lan;Cui, Zhi-Yuan;Kim, Nam-Soo
    • Transactions on Electrical and Electronic Materials
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    • 제11권1호
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    • pp.24-28
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    • 2010
  • A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.