• ETRI Journal
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• v.27 no.5
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• pp.551-556
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• 2005

We have demonstrated a high-power widely tunable sampled grating distributed Bragg reflector (SGDBR) laser integrated monolithically with a semiconductor optical amplifier (SOA) having a lateral tapered waveguide, which is the first to emit a fiber-coupled output power of more than 10 dBm using a planar buried heterostructure (PBH). The output facet reflectivity of the integrated SOA using a lateral tapered waveguide and two-layer AR coating of $TiO_2\;and\;SiO_2$ was lower than $3\;{\times}\;10^{-4}\;over$ a wide bandwidth of 85 nm. The spectra of 40 channels spaced by 50 GHz within the tuning range of 33 nm were obtained by a precise control of SG and phase control currents. A side-mode suppression ratio of more than 35 dB was obtained in the whole tuning range. Fiber-coupled output power of more than 11 dBm and an output power variation of less than 1 dB were obtained for the whole tuning range.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.65-71
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• 2015

This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1081-1085
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• 2009

We have already developed EMI reducing techniques using lossless compression by vertically differential EMI suppression method (VDE[1]). It applies lossless modulo reduction and data bit mapping optimization for low voltage differential signaling (LVDS) transmission lines, that reduces the probability of transient bit and EMI by 12 dB [6][7]. We also improved and optimized the VDE for low power LCD interface. With this modified VDE algorithm[8], the developed FPGA was measured the reduction of the power consumption of LCD circuit by more than 15 % compared to the conventional methods in the case of 14-in LCD with SXGA resolution. The VDE algorithm is based on the total image systematic approach. In the VDE method, the present image signals are subtracted for the 1H delayed image signals and transferred to a column driver through a PCB. As the vertical correlations for image signals are very high, we expected that most of the vertically subtracted image signals remain 0 level and transient cycles become very long. As a result, the power consumption and EMI are extremely reduced for the transferred image signals on a PCB. In this paper, we discussed our proposed method by emphasizing the fact that systematic approach are important based on not only display point of view but also total system point of view.

• Journal of the Semiconductor & Display Technology
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• v.21 no.2
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• pp.95-100
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• 2022

In this paper, a power loss analysis technique of a high-frequency transformer of a bidirectional DAB (Dual Active Bridge) converter is reported. To miniaturize the transformer of the dual active bridge converter, a resonant inductor was designed with an air gap included low-coupled rate state core to combine leakage inductor with the resonant inductor which is required for soft-switching. In this paper, leakage inductance and magnetizing inductance, core material, type of winding and winding method are included in the dual active bridge transformer loss analysis process to enable optimal design at the initial design stage. Transformer loss analysis for dual active bridge with a switching frequency of 200 kHz and maximum output of 5 kW was executed, and elements necessary for design based on the number of turns on the primary side were graphed while maintaining the transformer turns ratio and window area. In particular, it was possible to determine the optimal number of turns and thickness of the transformer, and ultimately, the total loss of the transformer could be estimated.

• Korean Journal of Optics and Photonics
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• v.21 no.3
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• pp.111-117
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• 2010

A 780 nm monolithic individually addressable 8-beam diode laser with 10mW optical power was developed for use in a laser scanning unit. Beam to beam spacing is $30\;{\mu}m$ and an air bridge interconnection process was developed for individual operations. From electrical and optical characteristic measurements, the developed device is a suitable optical source for a high speed laser scanning unit in multi-function printing systems and laser beam printers.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.280-285
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• 2015

A fully integrated high-efficiency linear CMOS power amplifier (PA) is developed for 802.11n WLAN applications using the 65-nm standard CMOS technology. The transformer topology is investigated to obtain a high-efficiency and high-linearity performance. By adopting a 2:2 output transformer, an optimum impedance is provided to the PA core. Besides, a LC harmonic control block is added to reduce the AM-to-AM/AM-to-PM distortions. The CMOS PA produces a saturated power of 26.1 dBm with a peak power-added efficiency (PAE) of 38.2%. The PA is tested using an 802.11n signal, and it satisfies the stringent error vector magnitude (EVM) and mask requirements. It achieves -28-dB EVM at an output power of 18.6 dBm with a PAE of 14.7%.

• ETRI Journal
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• v.43 no.6
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• pp.1103-1112
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• 2021

In this study, we present a venting clip for high-power applications that is intended to reduce stray inductance. To reduce the stray inductance of packages in high-power applications, the proposed venting clip features slots are inserted onto a conventional clip. A conventional clip and the proposed venting clip were designed and fabricated to compare the respective stray inductance. The inductance of the proposed venting clip was approximately 15.8% than that of the conventional clip at a frequency of 100 kHz. Through a comparison between the conventional and venting clips, it is confirmed that the proposed venting clip is superior for high-power applications in terms of decreasing inductance. With reduced inductance, the switching-loss for such applications is also expected to decrease. Moreover, the impedance of the venting clip decreased by approximately 15.5% compared with that of the conventional clip at a frequency of 100 kHz. The venting clip, which has reduced resistive component, is also expected to decrease conduction loss in highpower applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.1-6
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• 2002

Plasma processing of semiconductor materials plays a dominant role in microelectronic technology. During last century, plasma have gone a way from laboratory phenomena to industrial applications due to intensive progress in both scientific and industrial trends. Improvement and development of new experience together with development of plasma theory and plasma diagnostics methods. A most parameters (pressure, flow rate, power density) and various levels of plasma system (energy distribution, volume gas chemistry, transport, heterogeneous effects) to understand the whole process mechanism. It will allow us to choose a correct ways for processes optimization.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.

• Journal of IKEEE
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• v.18 no.1
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• pp.19-24
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• 2014

We report stable, wideband, flat-topped, 10 GHz optical frequency comb generation from a semiconductor-based mode-locked ring laser with an intra-cavity high finesse Fabry-Perot etalon. We demonstrate a stable 10 GHz comb with greater than 200 lines within a spectral power variation below 1 dB, which is the largest value obtained from a similar mode-locked laser in our knowledge. Greater than 20 dB of the spectral peak to deep ratio at 0.02 nm resolution, ~92 femtosecond timing jitter over 1 kHz to 1 MHz range, and non-averaged time traces of pulses confirm very stable optical frequency comb lines.