• The Transactions of the Korean Institute of Electrical Engineers D
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• v.52 no.5
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• pp.290-294
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• 2003

Using a backpropagation neural network (BPNN), a high power semiconductor device was empirically modeled. The device modeled is a n-LDMOSFET and its electrical characteristics were measured with a HP4156A and a Tektronix curve tracer 370A. The drain-source current $(I_{DS})$ was measured over the drain-source voltage $(V_{DS})$ ranging between 1 V to 200 V at each gate-source voltage $(V_{GS}).$ For each $V_{GS},$ the BPNN was trained with 100 training data, and the trained model was tested with another 100 test data not pertaining to the training data. The prediction accuracy of each $V_{GS}$ model was optimized as a function of training factors, including training tolerance, number of hidden neurons, initial weight distribution, and two gradients of activation functions. Predictions from optimized models were highly consistent with actual measurements.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.4
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• pp.275-283
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• 2021

In this study, a driver IC for an AC-powered LED that can be manufactured with a low voltage semiconductor process is designed and the performances of the driver IC were simulated. In order to manufacture a driver IC that operates directly at AC 220V, a semiconductor manufacturing process that satisfies a breakdown voltage of 500V or higher is required. A semiconductor manufacturing process for a high-voltage device requires a much higher manufacturing cost than a general semiconductor process for a low-voltage device. Therefore, the LED driver IC is designed in series so that it can be manufactured with semiconductor process technology that implements a low-voltage device. This makes it possible to divide and apply the voltage to each LED block even if the input voltage is high. The LED lighting circuit shows a power factor of 96% at 220V. In the pnp transistor circuit, a very high power factor of 99.7% can be obtained, and it shows a very stable operation regardless of the fluctuation of the input voltage.

• Journal of the Semiconductor & Display Technology
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• v.13 no.4
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• pp.43-48
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• 2014

Two-level inverter has some disadvantages like high harmonics contained in the output current, efficiency limit and stress to switching device as IGBT and FET. Many researches have reported multi-level inverter to complement two-level inverter of problems. In this paper, we suggest MPPT algorithm of multi-string three-level solar inverter that considered nowadays. We added midpoint controller in order to implement the MPPT algorithm because the three-level inverter has to need midpoint controller and procured the stability of direct current link. We verify the superiority of multi-string T-Type inverter and the algorithm we suggested with solar irradiance variation experiment and MPPT efficiency measurement. The MPPT efficiency was confirmed with a high efficiency more than 99.97%.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.686-694
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• 2014

A power semiconductor device, usually used as a switch or rectifier, is very significant in the modern power industry. The power semiconductor, in terms of its physical properties, requires a high breakdown voltage to turn off, a low on-state resistance to reduce static loss, and a fast switching speed to reduce dynamic loss. Among those parameters, the breakdown voltage and on-state resistance rely on the doping concentration of the drift region in the power semiconductor, this effect can be more important for a higher voltage device. Although the low doping concentration in the drift region increases the breakdown voltage, the on-state resistance that is increased along with it makes the static loss characteristic deteriorate. On the other hand, although the high doping concentration in the drift region reduces on-state resistance, the breakdown voltage is decreased, which limits the scope of its applications. This addresses the fact that breakdown voltage and on-state resistance are in a trade-off relationship with a parameter of the doping concentration in the drift region. Such a trade-off relationship is a hindrance to the development of power semiconductor devices that have idealistic characteristics. In this study, a novel structure is proposed for the Insulated Gate Bipolar Transistor (IGBT) device that uses conductivity modulation, which makes it possible to increase the breakdown voltage without changing the on-state resistance through use of a P-floating layer. More specifically in the proposed IGBT structure, a P-floating layer was inserted into the drift region, which results in an alleviation of the trade-off relationship between the on-state resistance and the breakdown voltage. The increase of breakdown voltage in the proposed IGBT structure has been analyzed both theoretically and through simulations, and it is verified through measurement of actual samples.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.1003-1007
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• 1998

In recent years inverter power sources are more and more used for resistance welding processes. In this paper some results of investigation into the static and dynamic behavior of high-current rectifier diodes used in these inverter power sources will be discussed. By means of digital simulation, losses and efficiency have been determined depending on the power semiconductor parameters.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.408-415
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• 2001

Using power semiconductor switches such as IGBTs, diodes and L-C circuits, novel repetitive impulse voltage generator is developed. In the presented circuits, high voltage pulse is generated by series-connection of capacitors and IGBTs. Therefore, the high voltage pulse is obtained by circuit configuration without any high voltage pulse transformer and high voltage dc source. Especially, the proposed circuit can operate up to several kHz and have high reliability and longer life than conventional ones. In also gives voltage balance of IBGTs automatically. So, the difference of characteristics of IGBTs and drive signal does not cause severe problems. To verify the proposed circuit, 20kV and 300A pulse generator is manufactured and tested.

• Journal of Power Electronics
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• v.7 no.3
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• pp.181-190
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• 2007

This paper presents a novel circuit topology of a DC bus line series switch and parallel snubbing capacitor-assisted soft-switching PWM full-bridge inverter type DC-DC power converter with a high frequency planar transformer link, which is newly developed for high performance arc welding machines in industry. The proposed DC-DC power converter circuit is based upon a voltage source-fed H type full-bridge soft-switching PWM inverter with a high frequency transformer. This DC-DC power converter has a single power semiconductor switching device in series with an input DC low side rail and loss less snubbing capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge arms and DC bus line can achieve ZCS turn-on and ZVS turn-off transition commutation. Consequently, the total switching power losses occurred at turn-off switching transition of these power semiconductor devices; IGBTs can be reduced even in higher switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules can be realized at 60 kHz. It is proved experimentally by power loss analysis that the more the switching frequency increases, the more the proposed DC-DC power converter can achieve a higher control response performance and size miniaturization. The practical and inherent effectiveness of the new DC-DC converter topology proposed here is actually confirmed for low voltage and large current DC-DC power supplies (32V, 300A) for TIG arc welding applications in industry.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.8
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• pp.69-75
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• 1998

We demonstrate wavelength conversion of 2.5Gb/s optical signals by four-wave mixing (FWM) in a semiconductor optical amplifier (SOA). We investigate the effect of input pump and signal powers on the coversion efficiency, optical signal-to-noise ratio (OSNR) and extinction ratio to be a measure of performance in a wavelength converter. As a result, we show that the maximum bit error rate (BER) performance can be obtained by co promising among high-vonversion efficiency (minimum Pprobe), high-OSNR (maximum Pprobe) and low-cross-gain saturation effects (Pprobe kept at least 6dB weaker than Ppump). In our experiment, we obtain optimum performance at +3 dBm pump power and -6dBm signal power. The power penalty incurred in the wavelength conversion can be minimized by careful selection of the input pump and signal powers. We show that about 0.5dB power penalty for 3.2nm wavelength coversion at 10-10 BER is achievable.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.68-71
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• 2021

In this paper, GaN-SBD devices with excellent breakdown voltage and frequency characteristics for use in high-power microwave wireless power transmission has been modeled for PSpice circuit simulation. The RF-DC conversion circuits were simulated and compared with a commercial Si-SBD device. Although the modeled GaN-SBD devices had lower RF-DC conversion efficiency compared to Si-SBD at 2.4 and 5.8 GHz, it was confirmed through PSpice circuit simulations that they can be used sufficiently according to the required application circuit in a high power situation.

• ETRI Journal
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• v.19 no.2
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• pp.35-47
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• 1997

A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.