• 대한전기학회논문지
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• 제39권1호
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• pp.49-56
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• 1990

An induction motor position control system based on the sliding mode control is presented. In the sliding mode control, control function is discontinuous on the hyperplane, which causes harmful effects such a s current harmonics and acoustic noise in the motor drive application. In this study, a low pass filter is introduced between the sliding mode controller output and the motor controller input to reduce these effects. The filter, however, makes the torque response slggish and the system performance may become poor in cost of chattering reduction. To overcome these problems, the bandwidth of the filer is varied according to the error function. It is shown that the proposed sliding mode control with variable-bandwidth filter shows good performance, which is confirmed through experiments.

• 전력전자학회논문지
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• 제22권2호
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• pp.181-184
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• 2017

This study analyzes the turn-on and turn-off transients of a metal-oxide-semiconductor field-effect transistor (MOSFET) with high-switching frequency systems. In these systems, the voltage distortion becomes serious at the output terminal of a Vienna rectifier by the turn-off delay of the MOSFET. The current has low-order harmonics through this voltage distortion. This paper describes the transient of the turn-off that causes the voltage distortion. The algorithm for reducing the sixth harmonic using a proportional-resonance controller is proposed to improve the current distortion without complex calculation for compensation. The reduction of the current distortion by high-switching frequency is verified by experiment with the 2.5-kW prototype Vienna rectifier.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.480-481
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• 2012

본 논문에서는 태양광 발전 시스템에서 발생하는 저차 고조파를 저감하는 기법을 제안한다. 태양광 발전 시스템에 포함된 단상 인버터는 기본파의 2배 주파수를 가지는 2차 고조파를 만들어낸다. 이 저차 고조파는 컨버터 전류의 리플로 작용하여 태양전지의 출력을 최대로 높이는 최대전력점 추종기법의 효율을 저감시킨다. 본 논문에서는 계통연계형 태양광 발전 시스템에서 발생하는 저차 고조파를 분석한다. 그리고 추가적인 하드웨어 소자 없이 비례공진 제어기를 사용한 새로운 전향보상 성분을 통해 효과적으로 제거한다. 제안된 알고리즘은 시뮬레이션을 바탕으로 타당성을 검증한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.853-855
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• 1993

In this paper, a further improved system obtaining very low distorted waveforms of input ac currents of three phase rectifier circuit is proposed. The proposed system consists of an uncomplicated 24 pulse diode bridge rectifier that is transformerless, by adding only switching circuit which consists of two switchs to conventional system. Also to optimum the effectiveness or the harmonic reduction, the optimum turn ratio of an autotransformer and the optimum switching control angle are decided by computer simulation. And then, the voltage waveform obtained has a total harmonic distortion of 8.1%, and the predominant harmonics 23th and 25th. This paper describes operation principle, analysis of the waveforms of input voltage and current. The theoretial results are verified through simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.856-859
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• 1993

Line-current harmonics resulting from AC to DC power conversion interfere with power system operation and reduce power factor, hence resulting in increasing power source unnecessarily. This paper investigates the harmonic reduction methods of a three-phase phase-controlled converter on AC and DC sides using passive filters and notches.

• Transactions on Electrical and Electronic Materials
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• 제18권3호
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• pp.129-135
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• 2017

This paper introduces a design and a simulation of a hybrid active power filter (HAPF) for harmonics reduction given an ideal supply source. The synchronous reference frame method has been used here to identify the reference currents. The proposed HAPF uses a new artificial- intelligence technique called Particle Swarm Optimization (PSO) for tuning the parameters of a proportional and integral controller called PI-PSO. The PI-PSO controller is used to archive optimality for the DC-link voltage of the HAPF-inverter. The hysteresis non-linear current control method is used in this approach to compare the extracted reference and the actual currents in order to generate the pulse gate required for the HAPF. Results obtained by simulations with Matlab/Simuling show that the proposed approach is very flexible and effective for eliminating harmonic currents generated by the non-linear load with the HAPF based PSO tuning.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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• pp.1489-1491
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• 2005

This paper proposes a design method using PQR instantaneous power theory on the active power filter, unbalanced nonlinear load condition and unbalanced source voltage condition in three-phase four-wire systems. For reduction of current harmonics and neutral current, the control structure including repetitive controller is proposed and controller gain is designed. For fully-digital implementation, ramp comparison PWM method was adopted. Simulation results verify good performance of the proposed current control strategy on the shunt APFs.

• Journal of Power Electronics
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• 제17권4호
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• pp.1004-1013
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• 2017

This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter. The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving scheme.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.146-150
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• 2001

A new three-phase soft-switching active front-end inverter is presented. The topology consists of a quasi-resonant PWM boost converter with an additional resonant branch, which provides low loss at high frequency operation. This leads to a high conversion efficiency and a remarkable reduction in the size of the input inductor. To synchronise the PWM pattern with the resonance cycle, a modified space vector modulation with asymmetrical PWM pattern is used. A high power factor can be achieved for both power flow directions. Due to a new control strategy the converter features a low content of harmonics in the line currents even for distorted line voltages.

• IEIE Transactions on Smart Processing and Computing
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• 제4권5호
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• pp.371-378
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• 2015

In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.