• Title/Summary/Keyword: Harmonic Frequency

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A New Structure Frequency Doubler Using Phase Delay Line (위상 지연 선로를 이용한 새로운 구조의 주파수 2체배기)

  • Cho, Seung-Yong;Lee, Kyoung-Hak;Kim, Yong-Hwan;Do, Ji-Hoon;Lee, Hyung-Kyu;Hong, Ui-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.2A
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    • pp.213-219
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    • 2007
  • In this paper, A novel structure of frequency doubler using Phase Delay line and $90^{\circ}$ Hybrid coupler at harmonic output have been designed and implemented to improve suppression. Proposed structure of frequency doubler improve output. coupling and fundamental suppression. Active frequency doubler with band from $2.13{\sim}2.15GHz\;to\;4.26{\sim}4.3GHz$ was designed and fabricated with 10dBm input power, 0.79dB conversion gain and -55.54dBc suppression at fundamental frequency, -44.76dBc suppression at third harmonic frequency 6.42GHz and -39.18dBc suppression at fourth harmonic frequency 8.56GHz.

Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter

  • Feng, Jiuyi;Song, Wenxiang;Xu, Yuan;Wang, Fei
    • Journal of Electrical Engineering and Technology
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    • v.12 no.5
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    • pp.1872-1882
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    • 2017
  • Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

A Study on Low Noise Frequency Synthesizer Design with Compact Size for Multi-Band (소형 다대역 저잡음 주파수 합성기 설계에 관한 연구)

  • Kim, Taeyoung;Han, Jonghoon
    • Journal of the Korea Institute of Military Science and Technology
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    • v.20 no.5
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    • pp.673-680
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    • 2017
  • In the proposed paper, we designed low noise frequency synthesizer with compact size for Multi-Band. The proposed frequency synthesizer consists of fundamental frequency band(2 GHz) and harmonic frequency band(4 GHz). To improve the phase noise and spurious level of frequency synthesizer, we analyze how the configuration of frequency synthesizer affect the phase noise and design the multi-band's structure. The implemented frequency synthesizer reduce both the phase noise and spurious level. The phase noise is -92.17 dBc/Hz at 1 kHz frequency offset in 2 GHz and -90.50 dBc/Hz at 1 kHz frequency offset in 4 GHz. All spurious signals including fundamental frequency are suppressed at least 20 dBc than the second harmonic frequency.

A Fast-Locking All-Digital Frequency Multiplier (고속-락킹 디지털 주파수 증배기)

  • Lee, Chang-Jun;Kim, Jong-Sun
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1158-1162
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    • 2018
  • A fast-lock multiplying delay-locked loop (MDLL)-based digital clock frequency multiplier with an anti-harmonic lock capability is presented. The proposed digital frequency multiplier utilizes a new most-significant bit (MSB)-interval search algorithm to achieve fast-locking time without harmonic lock problems. The proposed digital MDLL frequency multiplier is designed in a 65nm CMOS process, and the operating output frequency range is from 1 GHz to 3 GHz. The digital MDLL provides a programmable fractional-ratio frequency multiplication ratios of N/M, where N = 1, 4, 5, 8, 10 and M = 1, 2, 3, respectively. The proposed MDLL consumes 3.52 mW at 1GHz and achieves a peak-to-peak (p-p) output clock jitter of 14.07 ps.

Study on Generation of Harmonic Voltage using Synchronous Machine with d-axis and q-axis Harmonic Field Windings

  • Mukai, Eiichi;Kakinoki, Toshio;Yamaguchi, Hitoshi;Kimura, Yoshimasa;Fukai, Sumio
    • Journal of international Conference on Electrical Machines and Systems
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    • v.2 no.3
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    • pp.254-259
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    • 2013
  • We examined the generation of harmonic voltage by a synchronous machine adding d-axis and q-axis harmonic field windings in order to reduce the harmonics in a power line. We derived the expressions of the armature voltage in the case of supplying the currents with the frequency nf to the d-axis and q-axis harmonic field windings. We constructed the synchronous machine adding the harmonic windings. In this paper, the expressions and the experimental results on the generation of harmonic voltages by the synchronous machine are presented.

High-Performance Millimeter Wave Harmonic Output Oscillator using Sub-Harmonic Wave Injection-Synchronization (서브하모닉 주입동기에 의한 밀리미터파 대역 고조파 발진기의 고성능화)

  • Choi, Young-Kyu;Nam, Byeong-Gun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.1
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    • pp.17-24
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    • 2008
  • This paper deals with a millimeter wave source which is utilizing sub-harmonic injection-synchronization technique. A 8.7GHz oscillator with MES-FET is fabricated, and is driven as a harmonic output oscillator at 17.4GHz by means of sub-harmonic injection-synchronization. The oscillator operates as a multiplier as well as oscillator in this system. Adopting this technique, we can obtain a high stable, high frequency millimeter wave source even though self-oscillating frequency of an oscillator is relatively low. In the experiments, the range of injection-synchronization is about 26MHz and is proportional to the input sub-harmonic power. From the spectrum analysis of the 2nd harmonic output. we blow that the phase noise of the harmonic oscillator is remarkably decreased.

Study of Harmonic Suppression of Ship Electric Propulsion Systems

  • Wang, Yifei;Yuan, Youxin;Chen, Jing
    • Journal of Power Electronics
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    • v.19 no.5
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    • pp.1303-1314
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    • 2019
  • This paper studies the harmonic characteristics of ship electric propulsion systems and their treatment methods. It also adopts effective measures to suppress and prevent ship power systems from affecting ship operation due to the serious damage caused by harmonics. Firstly, the harmonic characteristics of a ship electric propulsion system are reviewed and discussed. Secondly, aiming at problems such as resonant frequency and filter characteristics variations, resonance point migration, and unstable filtering performances in conventional passive filters, a method for fully tuning of a passive dynamic tunable filter (PDTF) is proposed to realize harmonic suppression. Thirdly, to address the problems of the uncontrollable inductance L of traditional air gap iron core reactors and the harmonics of power electronic impedance converters (PEICs), this paper proposes an electromagnetic coupling reactor with impedance transformation and harmonic suppression characteristics (ECRITHS), with the internal filter (IF) designed to suppress the harmonics generated by PEICs. The ECRITHS is characterized by both harmonic suppression and impedance change. Fourthly, the ECRITHS is investigated. This investigation includes the harmonic suppression characteristics and impedance transformation characteristics of the ECRITHS at the fundamental frequency, which shows the good performance of the ECRITHS. Simulation and experimental evaluations of the PDTF are carried out. Multiple PDTFs can be configured to realize multi-order simultaneous dynamic filtering, and can effectively eliminate the current harmonics of ship electric propulsion systems. This is done to reduce the total harmonic distortion (THD) of the supply currents to well below the 5% limit imposed by the IEEE-519 standard. The PDTF also can eliminate harmonic currents in different geographic places by using a low voltage distribution system. Finally, a detailed discussion is presented, with challenges and future implications discussed. The research results are intended to effectively eliminate the harmonics of ship electric power propulsion systems and to improve the power quality of ship power systems. This is of theoretical and practical significance for improving the power quality and power savings of ship power systems.

FREQUENCY SELECTIVE RECURSIVE LP OF HARMONIC SPECTRA

  • SeungHyonNam
    • Journal of the Korean Geophysical Society
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    • v.4 no.4
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    • pp.231-238
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    • 2001
  • In this paper, an efficient LP method ofr discrete harmonic spectra is proposed and discussed. A new efficient LP method is a combination of recursive and frequency selective LP. While the recursive LP provides better spectral matching in spectral hills, frequency selective LP eliminates numerical instability and improves spectral matching when the harmonics are confined in the low frequncy region. The proposed LP method is applied to the HILN coder. Simulation results using a verification model(VM) software for real audio signals show a definite trend of significant improvement.

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Transversely isotropic thick plate with two temperature & GN type-III in frequency domain

  • Lata, Parveen;Kaur, Iqbal
    • Coupled systems mechanics
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    • v.8 no.1
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    • pp.55-70
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    • 2019
  • This investigation is focused on the variations in transversely isotropic thick circular plate due to time harmonic thermomechanical sources. The homogeneous thick circular plate in presence and absence of energy dissipation and two temperatures has been considered. Hankel transform is used for solving field equations. The analytical expressions of conductive temperature, displacement components, and stress components are computed in the transformed domain. The effects of frequency at different values are represented graphically. Some specific cases are also figured out from the current research.

The Design of a X-Band Frequency Synthesizer using the Subharmonic Injection Locking Method (Subharmonic Injection Locking 방법을 이용한 X-Band 주파수 합성기 설계)

  • 김지혜;윤상원
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.2
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    • pp.152-158
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    • 2004
  • A low phase noise frequency synthesizer at X-Band which employs the subharmonic injection locking was designed and tested. The designed frequency synthesizer consists of a 1.75 GHz master oscillator - which also operates as a harmonic generator - and a 10.5 GHz slave oscillator. A 1.75 GHz master oscillator based on PLL technique used two transistors - one constitutes the active part of VCO and the other operates as a buffer amplifier as well as harmonic generator. The first stage operates a fixed locked oscillator and using the BJT transistor whose cutoff frequency is 45 GHz, the second stage is designed, operating as a harmonic generator. The 6th harmonic which is produced from the harmonic generator is injected into the following slave oscillator which also behaves as an amplifier having about 45 dB gain. The realized frequency synthesizer has a 7.4 V/49 mA, -0.5 V/4 mA of the low DC power consumption, 4.53 dBm of output power, and a phase noise of -95.09 dBc/Hz and -108.90 dBc/Hz at the 10 kHz and 100 kHz offset frequency, respectively.