• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.923_924
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• 2009

본 논문에서는 소용량의 직류단 캐패시터를 가지는 교류전동기 구동 시스템의 전류 주입 방식 기반의 새로운 입력 전류 고조파 저감 방법에 대해 논의한다. 소용량 직류단 캐패시터를 가지는 전동기 구동 시스템의 가격 및 부피의 경쟁력을 유지하면서 주어진 고조파 규제를 만족시킬 수 있도록, 최소의 비용 추가로 입력 전류의 고조파를 저감하기 위한 새로운 회로를 제안하고, 제안된 회로를 이용하여 최적의 성능을 얻을 수 있는 제어 방법을 소개한다. 제안된 회로 구성 및 제어 방법의 타당성은 실험을 통하여 검증한다.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1160-1164
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• 2001

The input voltage of linear Induction motors(LIMs) is involved with the time harmonics because most LIM is driven by inverter. Therefore the equivalent circuit for an inverter-fed LIM has to be modifided to represent every harmonic present in supply voltage. This paper describes that the dynamic characteristic can be used effectively for analyzing the characteristics of a linear induction motor position and speed control.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.630-633
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• 1997

This paper describes a design of a single phase PWM converter for high speed train. Parallel operation and control method of four Quadrant PWM converters are described. Simulation and modelling of the converters is performed. Capacity of the converter/inverter and power circuit for high speed traction system designed. And harmonic contents of AC line current's are analyzed. The results of the simulation are presented.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.585-588
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• 2002

In this paper, the current controlled active poler filter(APF) with the performance of reducing harmonic and improving power factor is studied. It has high speed and good performance with low cost. The current controlled shunt APF is proposed, and the control part of APF is designed of SOC(System On Chip). So this system has low expense and good performance. In this study, the micro-controller which designed with VHDL. is applied to APF system. And the proposed technique in this paper demonstrates the excellent of the dedicated micro-controller. VHDL-based ASIC can simplify the process of development and has a competition in market because it reduces the consuming time for the design of IC(Integrated Circuit) in system level.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.8 no.2
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• pp.69-76
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• 1994

An effective method for reducing the harmonics in double connected modified current source inverter[MCSI] by switching taps on auto transformer is presented in this paper. The proposed system operates as like a 24 step MCSI by adding only tap changing auxiliary circuit which consists of several taps and static switching elements to the 12 step multiple inverter, which is double connected three-phase six-step MCSI with an auto transformer. The basic theories of the proposed inverter systems for analyzing the output waveforms are described. And to optimize the effectiveness of the harmonic reduction, the optimum turn ratio and the tap changing control angle of auto transformer are decided by digital simulation and its validity is verified by experiment. Although the construction of the proposed inverter is very simple, it is clarified that the output waveform of the inverter is almost the same as that of the conventional 24 step multiple inverter under the optimum condition.

• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.63-75
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• 2015

The CMOS power amplifier (PA) is a promising solution for highly-integrated transmitters in a single chip. However, the implementation of PAs using the CMOS process is a major challenge because of the inferior characteristics of CMOS devices. This paper focuses on improvements to the efficiency and linearity of CMOS PAs for modern wireless communication systems incorporating high peak-to-average ratio signals. Additionally, an envelope tracking supply modulator is applied to the CMOS PA for further performance improvement. The first approach is enhancing the efficiency by waveform engineering. In the second approach, linearization using adaptive bias circuit and harmonic control for wideband signals is performed. In the third approach, a CMOS PA with dynamic auxiliary circuits is employed in an optimized envelope tracking (ET) operation. Using the proposed techniques, a fully integrated CMOS ET PA achieves competitive performance, suitable for employment in a real system.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.342-344
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• 2001

The single phase control system may become noisy when speed is controlled with a conventional triac AC controller. This paper describes that a simple modification to the triac circuit is shown to reduce the effect, at the cost of increased power dissipation in the controller.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2067-2075
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• 2016

Cascaded H-bridge multilevel inverters are currently used because it enables the integration of various sources, such as batteries, ultracapacitors, photovoltaic array and fuel cells in a single system. Conventional modulation schemes for multilevel inverters have concentrated mainly on the generation of a low harmonic output voltage, which results in less effective utilization of connected sources. Less effective utilization leads to a difference in the charging/discharging of sources, causing unsteady voltages over a long period of operation and a reduction in the lifetime of the sources. Hence, a charge balance control scheme has to be incorporated along with the modulation scheme to overcome these issues. In this paper, a new approach for charge balancing in symmetric cascaded H-bridge multilevel inverter that enables almost 100% charge balancing of sources is presented. The proposed method achieves charge balancing without any additional stages or complex circuit or considerable computational requirement. The validity of the proposed method is verified through simulation and experiments.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.659-662
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• 2005

In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.1
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• pp.24-31
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• 1992

A 24 pulse current source inverter for reducing the harmonics in output currents is presented in this paper. The proposed system operates a 24 pulse inverter by adding only tap changing circuit which consists of several taps and static switching elements to the 12 pulse inverter, which is the double connected 3 phase 6 pulse inverter with an auto transfomer. Also to optimize the effectiveness of the harmonic reduction, the optimum turn ratio and tap changing control angle of auto transfomer are decided by digital simulation and its validity is verified with experiment. And under the optimum condition, it is clarified that the harmonics components involved in the output current of the proposed inverter are nearly equal to those of the conventional 24 pulse inverter.