• 제목/요약/키워드: Hardware-in-the-loop

검색결과 524건 처리시간 0.027초

High-Speed Hardware Architectures for ARIA with Composite Field Arithmetic and Area-Throughput Trade-Offs

  • Lee, Sang-Woo;Moon, Sang-Jae;Kim, Jeong-Nyeo
    • ETRI Journal
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    • 제30권5호
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    • pp.707-717
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    • 2008
  • This paper presents two types of high-speed hardware architectures for the block cipher ARIA. First, the loop architectures for feedback modes are presented. Area-throughput trade-offs are evaluated depending on the S-box implementation by using look-up tables or combinational logic which involves composite field arithmetic. The sub-pipelined architectures for non-feedback modes are also described. With loop unrolling, inner and outer round pipelining techniques, and S-box implementation using composite field arithmetic over $GF(2^4)^2$, throughputs of 16 Gbps to 43 Gbps are achievable in a 0.25 ${\mu}m$ CMOS technology. This is the first sub-pipelined architecture of ARIA for high throughput to date.

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Development of ABS ECU for a Bus using Hardware In-the-Loop Simulation

  • Lee, K.C.;Jeon, J.W.;Nam, T.K.;Hwang, D.H.;Kim, Y.J.
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.1714-1719
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    • 2003
  • Antilock Brake System (ABS) is indispensable safety equipment for vehicles today. In order to develop new ABS ECU suitable for pneumatic brake system of a bus, a Hardware In-the-Loop Simulation (HILS) System was developed. In this HILS, the pneumatic brake system of a bus and antilock brake component were used as hardware. For the computer simulation, the 14-Degree of Freedom (DOF) bus dynamic model was constructed using the Matlab/Simulink software package. This model was compiled and downloaded in the simulation board, where the Power PC processor was used for real-time simulation. Additional commercial package, the ControlDesk was used to monitor the dynamic simulation results and physical signal values. This paper will focus on the procedure and results of evaluating the ECU in the HILS simulation. Two representative cases, wet basalt road and $split-{\mu}$ road, were used to simulate real road conditions. At each simulated road, the vehicle was driven and stopped under the help of the developed ECU. In each simulation, the dynamical behavior of the vehicle was monitored. After enough tests in the laboratory using HILS, the parameter-tuned ECU was equipped in a real bus, which was driven and stopped in the real test field in Korea. And finally, the experiment results of ABS equipped vehicle's dynamic behavior both in HILS test and in test fields were compared.

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더블라인 주파수 제거를 위한 양방향 컨버터의 전력 디커플링 제어 (Power Decoupling Control of the Bidirectional Converter to Eliminate the Double Line Frequency Ripple)

  • Amin, Saghir;Choi, Woojin
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2018년도 추계학술대회
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    • pp.62-64
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    • 2018
  • In two-stage single-phase inverters, inherent double line frequency component is present at both input and output of the front-end converter. Generally large electrolytic capacitors are required to eliminate the ripple. It is well known that the low frequency ripple shortens the lifespan of the capacitor hence the system reliability. However, the ripple can hardly be eliminated without the hardware combined with an energy storage device or a certain control algorithm. In this paper, a novel power-decoupling control method is proposed to eliminate the double line frequency ripple at the front-end converter of the DC/AC power conversion system. The proposed control algorithm is composed of two loop, ripple rejection loop and average voltage control loop and no extra hardware is required. In addition, it does not require any information from the phase-locked-loop (PLL) of the inverter and hence it is independent of the inverter control. In order to prove the validity and feasibility of the proposed algorithm a 5kW Dual Active Bridge DC/DC converter and a single-phase inverter are implemented, and experimental results are presented.

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고성능 HEVC 부호기를 위한 루프 내 필터 하드웨어 설계 (Hardware Design of In-loop Filter for High Performance HEVC Encoder)

  • 박승용;임준성;류광기
    • 한국정보통신학회논문지
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    • 제20권2호
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    • pp.335-342
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    • 2016
  • 본 논문에서는 고성능 HEVC(High Efficiency Video Coding) 부호기를 위한 루프 내 필터의 효율적인 하드웨어 구조를 제안한다. HEVC는 양자화 에러가 발생하는 복원 영상에서 화질을 향상시키기 위해 디블록킹 필터와 SAO(Sample Adaptive Offset)으로 구성된 루프 내 필터를 사용한다. 그러나 루프 내 필터는 추가적인 연산으로 인하여 부호기와 복호기의 복잡도가 증가되는 원인이 된다. 제안하는 루프 내 필터 하드웨어 구조는 수행 사이클 감소를 위해 디블록킹 필터와 SAO를 3단 파이프라인으로 구현되었다. 또한 제안하는 디블록킹 필터는 6단 파이프라인 구조로 구현되었으며, 효율적인 참조 메모리 구조를 위해 새로운 필터링 순서로 수행된다. 제안하는 SAO는 화소들의 처리를 간소화하며 수행 사이클을 감소시키기 위해 한번에 6개의 화소를 병렬 처리된다. 제안하는 루프 내 필터 하드웨어 구조는 Verilog HDL로 설계되었으며, TSMC $0.13{\mu}m$ CMOS 표준 셀 라이브러리를 사용하여 합성한 결과 약 131K개의 게이트로 구현되었다. 또한 164MHz의 동작 주파수에서 4K@60fps의 실시간 처리가 가능하며, 최대 동작 주파수는 416MHz이다.

Design of an Autonomous Hover Control System for a Small Quadrotor

  • Raharja, Gilar B.;Kim, Gyu-Beom;Yoon, K.J.
    • International Journal of Aeronautical and Space Sciences
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    • 제11권4호
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    • pp.338-344
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    • 2010
  • This paper discusses the development of the control system of a mini quadrotor in Konkuk University for indoor applications. The attitude control system consists of a stability augmentation system, which acts as the inner loop control, and a modern control approach based on modeling will be implemented as the outer loop. The inner loop control was experimentally satisfied by a proportional-derivative controller; this was used to support the flight test in order to validate the modeling. This paper introduces the mathematical model for the simulation and design of the optimal control on the outer loop control. To perform the experimental tests, basic electronic hardware was developed using simple configurations; a microcontroller used as the embedded controller, a low-cost 100 Hz inertial sensors used for the inertial sensing, infra-red sensors were employed for horizontal ranging, an ultrasonic sensor was used for ground ranging and a high performance propeller system built on an quadrotor airframe was also employed. The results acquired from this compilation of hardware produced an automatic hovering ability of the system with ground control system support for the monitoring and fail-safe system.

효율적인 필터 계수 추출을 위한 HEVC 부호화기의 고성능 ALF 하드웨어 설계 (Hardware Design of High Performance ALF in HEVC Encoder for Efficient Filter Coefficient Estimation)

  • 신승용;류광기
    • 한국정보통신학회논문지
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    • 제19권2호
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    • pp.379-385
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    • 2015
  • 본 논문에서는 필터 계수를 효율적으로 추출하기 위한 고성능 ALF(Adaptive Loop Filter)의 하드웨어 구조를 제안한다. HEVC의 ALF 기술은 고해상도 및 고화질의 영상을 높은 효율로 압축하고 주관적 화질을 향상시키기 위해 영상의 통계적인 특성을 이용한 필터 계수를 추출하여 필터링을 수행한다. 제안하는 ALF 하드웨어 구조는 필터 계수를 추출하기 위한 촐레스키 분해의 연산 관계를 분석하여 2단 파이프 구조로 설계함으로써 수행 사이클을 감소시켰다. 또한, 촐레스키 분해의 연산 과정에서 필요한 루트 연산은 멀티플렉서와 뺄셈기, 비교기 등을 이용하여 설계함으로써 적은 면적과 연산량, 복잡도를 갖는 하드웨어 구조로 설계하였다. 제안한 하드웨어는 Xilinx ISE 14.3 Vertex-7 XC7VCX485T FPGA 디바이스를 사용하여 합성한 결과 4K(3840x2160)@40fps의 영상을 실시간 처리할 수 있고, 최대 동작주파수는 186MHz이다.

고분자전해질 연료전지 특성 해석을 위한 열관리 계통 모델 기반 HILS 기초 연구 (Model Based Hardware In the Loop Simulation of Thermal Management System for Performance Analysis of Proton Exchange Membrane Fuel Cell)

  • 윤진원;한재영;김경택;유상석
    • 한국수소및신에너지학회논문집
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    • 제23권4호
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    • pp.323-329
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    • 2012
  • A thermal management system of a proton exchange membrane fuel cell is taken charge of controlling the temperature of fuel cell stack by rejection of electrochemically reacted heat. Two major components of thermal management system are heat exchanger and pump which determines required amount of heat. Since the performance and durability of PEMFC system is sensitive to the operating temperature and temperature distribution inside the stack, it is necessary to control the thermal management system properly under guidance of operating strategy. The control study of the thermal management system is able to be boosted up with hardware in the loop simulation which directly connects the plant simulation with real hardware components. In this study, the plant simulation of fuel cell stack has been developed and the simulation model is connected with virtual data acquisition system. And HIL simulator has been developed to control the coolant supply system for the study of PEMFC thermal management system. The virtual data acquisition system and the HIL simulator are developed under LabVIEWTM Platform and the Simulation interface toolkit integrates the fuel cell plant simulator with the virtual DAQ display and HIL simulator.

고분자 전해질 연료전지 하이브리드 무인 비행기의 설계, 제어, 평가 기법 리뷰 (Design, Control and Evaluation Methods of PEM Fuel Cell Unmanned Aerial Vehicle: A review)

  • 차문용;김민진;손영준;양태현
    • 한국수소및신에너지학회논문집
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    • 제25권4호
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    • pp.405-418
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    • 2014
  • Fuel cells are suitable for a power plant of a unmanned aerial vehicle (UAV) as it is not only environmentally friendly and quiet but also more efficient than an internal combustion engine. A fuel cell hybrid UAV has better performance in endurance than a fuel cell only or battery only UAV. One of the key purposes of making fuel cell hybrid UAVs is having long endurance and now maximum 26 hours of flight is possible. Because optimal design and control methods for fuel cell hybrid UAVs are absolutely needed for their long endurance we have to check the methods. The aircraft made by using application-integrated design method has less BOP mass and better performances. The optimal design and control methods are generally based on computer simulations or Hardware-In-The-Loop simulations by using dynamic models for their design and control. The Hardware-In-The-Loop simulation (HILS) is to use a hardware device like a fuel cell stack as well as a simulation program and it allows for making optimally designed applications. This paper introduce efficient methods of design, control and evaluation for the fuel cell hybrid UAVs.