• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.4
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• pp.211-217
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• 2014

Cyber-Physical Systems(CPS) that mostly provides safety-critical and mission-critical services requires high reliability, so that system testing is an essential and important process. Hardware-In-the-Loop Simulation(HILS) is one of the extensively used techniques for testing hardware systems. However, most conventional HILS has problems that it is difficult to support a distributed operating environment and to reuse a HILS platform. In this paper, we introduce EcoHILS(ETRI CPS Open Human-Interactive hardware-in-the-Loop Simulator) in order to test CPS effectively. Moreover, feasibility tests and performance tests of EcoHILS are performed to confirm its effectiveness.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.191-200
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• 2019

This study proposes a hardware-in-the-loop simulation (HILS) system based on National Instruments' PXI platform to test power management and operation strategies for DC microgrids (MGs). The HILS system is developed based on the controller HIL prototype, which involves testing the controller board in hardware with a real-time simulation model of the plant in a real-time digital simulator. The system provides an economical and effective testing function for research on MG systems. The decentralized power management strategy based on the DC bus signaling method for DC MGs has been developed and implemented on the HILS platform. HILS results are determined to be similar to those of the off-line simulation in PSIM software.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.35 no.10
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• pp.940-947
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• 2007

For the performance upgrade of a supersonic jet fighter, the processor and FLCC(Flight Control Computer) Architecture were upgraded from a baseline FLCC. Prior to the hardware implementation phase, the exact CPU throughput estimation is necessary. For this purpose, an experimental method for new FLCC throughput estimation was introduced in this study.　While baseline FLCC operating, the CPU address bus was collected with logic analyzer, and then decoded to get the exact access times to each memory-memory and the number of program Instruction branches. Based on these data, a throughput test in CPU demo-board of the new FLCC configuration was performed. From test results, the CPU-Memory architecture was design-changed before FLCC hardware implementation phase. To check the flight stability degradation due to power-interrupt problem due to CPU-Memory architecture change, the piloted HILS (Hardware-In-the Loop Simulator) test was conducted.

• Journal of Korea Multimedia Society
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• v.12 no.2
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• pp.200-208
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• 2009

JBIG2, as the next generation standard for binary image compression, must be designed in hardware modules for the JBIG2 FAX to be implemented in an embedded equipment. This paper proposes a hardware module of the high-speed Huffman coder for JBIG2. The Huffman coder of JBIG2 uses selectively 15 Huffman tables. As the Huffman coder is designed to use minimal data and have an efficient memory usage, high speed processing is possible. The designed Huffman coder is ported to Virtex-4 FPGA and co-operating with a software modules on the embedded development board using Microblaze core. The designed IP was successfully verified using the simulation function test and hardware-software co-operating test. Experimental results shows the processing time is 10 times faster than that of software only on embedded system, because of hardware design using an efficient memory usage.

• International Journal of Automotive Technology
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• v.8 no.2
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• pp.203-209
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• 2007

As the vehicle electronic control technology quickly grows and becomes more sophisticated, a more efficient means than the traditional in-vehicle driving test is required for the design, testing, and tuning of electronic control units (ECU). For this purpose, the hardware-in-the-loop simulation (HILS) scheme is very promising, since significant portions of actual driving test procedures can be replaced by HIL simulation. The HILS incorporates hardware components in the numerical simulation environment, and this yields results with better credibility than pure numerical simulations can offer. In this study, a HILS system has been developed for ESP (Electronic Stability Program) ECUs. The system consists of the hardware component, which that includes the hydraulic brake mechanism and an ESP ECU, the software component, which virtually implements vehicle dynamics with visualization, and the interface component, which links these two parts together. The validity of HIL simulation is largely contingent upon the accuracy of the vehicle model. To account for this, the HILS system in this research used the commercial software CarSim to generate a detailed full vehicle model, and its parameters were set by using design data, SPMD (Suspension Parameter Measurement Device) data, and data from actual vehicle tests. Using the developed HILS system, performance of a commercial ESP ECU was evaluated for a virtual vehicle under various driving conditions. This HILS system, with its reliability, will be used in various applications that include durability testing, benchmarking and comparison of commercial ECUs, and detection of fault and malfunction of ESP ECUs.

• Aerospace Engineering and Technology
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• v.13 no.2
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• pp.1-6
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• 2014

Power system of the tilt-duct VTOL aerial robot has been developed. This paper focuses on the power train with small liquid-type engine for the R/C boat and presents the test results with design procedures. The hardware aspects of the power system include details about the hardware configurations for the interfaces with the vehicle. The ground test and tether test for measuring the thrust performance of vehicle and evaluating the endurance of power train carried out.

• ETRI Journal
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• v.36 no.2
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• pp.301-308
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• 2014

Three-dimensional integration technology results in area savings, platform power savings, and an increase in performance. Through-silicon via (TSV) assembly and manufacturing processes can potentially introduce defects. This may result in increases in manufacturing and test costs and will cause a yield problem. To improve the yield, spare TSVs can be included to repair defective TSVs. This paper proposes a new built-in self-test feature to identify defective TSV channels. For defective TSVs, this paper also introduces dynamic self-repair architectures using code-based and hardware-mapping based repair.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.8
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• pp.824-836
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• 2008

Relaxed static stability(RSS) concept has been applied to improve aerodynamic performance of modern version supersonic jet fighter aircraft. Therefore, flight control systems are necessary to stabilize an unstable aircraft, and provides adequate handling qualities and achieve performance enhancements. Standard FCSDVP (Flight Control System Design and Verification Process) is provided to reduce development period of the flight control system. In addition, if this process is employed in developing flight control system, it reduces the trial and error for development and verification of flight control system. This paper addresses the flight control system design and verification process for the RSS aircraft utilizing design goal based on military specifications, linear and nonlinear system design and verification based on universal software, handling quality test based on HILS(Hardware In-the-Loop Simulator) environment, and ground and flight test results to verify aircraft dynamic flight responses.

• Journal of the Korea Institute of Military Science and Technology
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• v.5 no.2
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• pp.123-131
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• 2002

ASC(Avionics System Computer) was developed to control weapon delivery and navigation sensors, and to perform man-machine interface with pilots for XKO-1 aircraft. The data communications between ASC and UFC(Up Front Controller), DC(Data Concentrator) were implemented by RS422 serial data bus. Also, SCIL(Standard Computer Interface Library) was designed to facilitate control and management of the computer hardware resources and is embedded in the ASC. These structures have a merit of noise immunity and a reduction of wire harness for signal lines, and enable OFP(Operational Flight Program) programmers to use the SCIL easily without knowing hardware details. Manufactured system was on installed on XKO-1, and peformed for BIT(Built In Test) and interface test with UFC and DC. The test results show that it meets the system requirements.

• Journal of the Korea Society for Simulation
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• v.25 no.1
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• pp.35-43
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• 2016

Increasing the proportion of an embedded system in automotive industry, test methods for evaluation and fault detection of the embedded system have been researched. HILS is a test method that is used in the development and test of complex real-time embedded systems. In this study, we defined the HILS method of the ECU, one of the embedded systems used in automobiles. Our method is to create a test model that can provide a virtual vehicle environment to the ECU on the basis of the actual vehicle data. The test model has reference information that can transmit the sensor signal and CAN Message into the ECU from HILS tester. In this study, the HILS can detect faults of the target ECU.