• Journal of Institute of Control, Robotics and Systems
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• v.10 no.1
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• pp.1-9
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• 2004

Inertial navigation system with hardware redundancy must use FDI(Fault Detection and Isolation) method to remove the influence of faulty sensors. Until now, several FDI methods such as PSA(Parity Space Approach), GLT(Generalized Likelihood ratio Test) and OPT(Optimal Parity vector Test) method are generally used. However, because these FDI methods only consider the situation that the system has one faulty sensor, these methods cannot be directly adapted for the system with two faulty sensors. To solve this problem, in this paper, PSA method is analyzed and based on this result, new FDI method called EPSA is proposed to consider a detection and an isolation of two faulty sensors in inertial navigation system.

• Proceedings of the Korean Reliability Society Conference
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• 2006.05a
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• pp.3-19
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• 2006

The Status quo of the reliability in China is described in this paper, a reliability surge is now spreading in China, covering the fields such as hardware, software, machinery and electronics. The reliability work in China was firstly conducted by the CEPREI Lab as far as early in the 1950s, and the reliability engineering in China has developed from the reliability of electronic products to that of machinery and non-electronic products, from hardware reliability to software reliability, from the attention to the reliability statistical test to emphasis on the reliability engineering test. Concern of Chinese companies about the reliability is the complete import of reliability engineering, the reliability testing, the software reliability and the reliability of lead-free soldering. Demonstration of reliability cases is given.

• Proceedings of the KSR Conference
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• 2002.10a
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• pp.168-173
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• 2002

In this paper, we introduce the hardware of the measuring system for on-line test and evaluation of high speed rail. It is composed of 6 DAMs(Data Aquisition modules), 2 monitoring modules and 1 main computer. Each of DAMs is connected many kinds of sensors, such as accelerometers, thermocouples, strain gauges, volt meters, current meter, odermeter, and measures the signals from sensors, saves it and displays it on the displayer. Two monitoring modules monitor the major signals transferred from DAMs. A main computer controls 4 DAMs(DAM1, DAM2, DAM31 and DAM32) and 2 monitoring modules and also monitors the major signals transferred from DAMs.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.121-123
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• 2019

본 논문에서는 실시간 시뮬레이터를 이용하여 DC 전력시스템의 모델링하고, Power Hardware-in-the-Loop (PHIL) 모의 테스트를 통해 DC 마이크로그리드에 적용 가능한 컨버터의 전력제어 알고리즘의 실효성을 검증하고자 한다. PHIL 모의시험 테스트 기법을 이용해 DC 마이크로그리드의 자율운전을 모사할 수 있는 Test-Bed를 제안하고자 한다. 이를 통해 부하 변화에 따른 운전 모드, 사고 상황 대처 알고리즘 등 DC 마이크로그리드에 연계된 전력변환장치의 전력제어 방법 및 실효성을 검증을 하고자 한다. 모의시험과 3 kW급 컨버터 시작품을 이용하여 제안하는 DC 마이크로그리드의 시험환경을 검증하고 전력제어 알고리즘의 신뢰성 및 안정성을 검증한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.05a
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• pp.216-219
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• 2021

In the Eco-Friendly Ship Act, the shaft generator is an equipment for eco-friendly ships. However, in order to apply the new technology in ships, high reliability is required, and the HILS (hardware in loop system) test is used as a verification method for this. Therefore, in this paper, a shaft generator is modeled and simulated for HILS test of a tugboat to which a shaft generator is applied. Through simulation, it was verified that the charging/discharging of the shaft generator operates according to the scenario.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.381-382
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• 2020

In the battery energy storage system, battery cells are connected in series to increase the operating voltage. Due to the difference in characteristics, the performance degradation of cells is dissimilar. This paper proposes an online DC internal impedance estimation for battery cells in the series string using a matrix-switched capacitor converter, which is already verified as useful for the series balancing of the cells. The simulation in the hardware in the loop test rig shows good accuracy and the feasibility of the proposed method.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1169-1172
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• 1998

We designed an ALU(Airthmetic Logic Unit) with BIST(Built-In Self Test), which is suitable for 32-bit DSP RISC processors. We minimized the area of this ALU by allowing different operations to share several hardware blocks. Moreover, we applied DFT(Design for Testability) to ALU and offered Bist(Built-In Self-Test) function. BIST is composed of pattern generation and response analysis. We used the reseeding method and testability design for the high fault coverage. These techniques reduce the test length. Chip's reliability is improved by testing and the cost of testing system can be reduced.

• Nuclear Engineering and Technology
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• v.43 no.4
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• pp.355-360
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• 2011

This paper is a study on a nuclear water chiller. It presents a test-verified finite element model of a water chiller to be used at a Nuclear Power Plant. The test-verified model predicts natural frequencies within 5% for all major modes below 50 Hz. This model accurately represents the dynamic characteristics of the actual hardware and is qualified for its use in the final stress analysis for seismic verification.

• ETRI Journal
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• v.42 no.4
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• pp.518-526
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• 2020

This paper presents an efficient hardware random-number generator based on a beta source. The proposed generator counts the values of "0" and "1" and provides a method to distinguish between pseudo-random and true random numbers by comparing them using simple cumulative operations. The random-number generator produces labeled data indicating whether the count value is a pseudo- or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800-22 and SP 800-90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.317-319
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• 2003

HILS(Hardware In-the Loop Simulation) is commonly used in the development and testing of embedded systems, when those systems cannot be tested easily, thoroughly, and repeated in their operational environments. HILS can be a useful tool to develop products more quickly and cost effectively and also reduces the possibility of serious defects being discovered after production. During the product development period, Design optimization and hardware/software debugging can be performed using HILS skill. This paper describes a HILS model for the STG(Steam-Turbine Generator) Simulator to prove the performance of the developed Digital Governor. It is developed using software technics which can confirm the responses of a real-time system.