• Title/Summary/Keyword: Hardware test

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Message Interoperability in e-Logistics System (e-Logistics시스템의 메시지 상호운용성)

  • Seo Sungbo;Lee Young Joon;Hwang Jaegak;Ryu Keun Ho
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.5
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    • pp.436-450
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    • 2005
  • Existing B2B, B2C computer systems and applications that executed business trans-actions were the client- server based architecture which consists of heterogeneous hardware and software including personal computers and mainframes. Due to the active boom of electronic business, integration and compatibility of exchanged data, applications and hardwares have emerged as hot issue. This paper designs and implements a message transport system and a document transformation system in order to solve the interoperability problem of integrated logistics system in e-Business when doing electronic business. Message transport system integrated ebMS 2.0 which is standard business message exchange format of ebXML, the international standard electronic commerce framework, and JMS of J2EE enable to ensure reliable messaging. The document transformation system could convert non-standard XML documents into standard XML documents and provide the web services after integrating message system. Using suggested business scenario and various test data, our message oriented system preyed to be interoperable and stable. We participated ebXML messaging interoperability test organized by ebXML Asia Committee ITG in oder to evaluate and certify the suitability for message system.

Current Trends in the Treatment of Syndesmotic Injury: Analysis of the Korean Foot and Ankle Society (KFAS) Member Survey (원위경비골인대 손상의 치료 동향: 대한족부족관절학회 회원 설문조사 분석)

  • Cho, Jaeho;Cho, Byung-Ki;Jeong, Bi O;Chung, Jin-Wha;Bae, Su-Young;The Academic Committee of Korean Foot and Ankle Society,
    • Journal of Korean Foot and Ankle Society
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    • v.26 no.2
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    • pp.95-102
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    • 2022
  • Purpose: This study was based on the Korean Foot and Ankle Society (KFAS) member survey and aimed to report the current trends in the management of syndesmotic injuries over the last few decades. Materials and Methods: A web-based questionnaire containing 36 questions was sent to all KFAS members in September 2021. The questions were mainly related to the preferred techniques and clinical experiences in the treatment of patients with syndesmotic injuries. Answers with a prevalence ≥50% of respondents were considered a tendency. Results: Seventy-six (13.8%) of the 550 members responded to the survey. The results showed that the most preferred method to diagnose a syndesmotic injury was magnetic resonance imaging (MRI). Intraoperatively, the external rotation stress test and the Cotton test were most frequently used to confirm syndesmotic diastasis. The reduction was usually done by a reduction clamp. One 3.5-mm screw was used most frequently over three cortices at 2~4 cm above the ankle joint. The preferred ankle position during fixation was 0° dorsiflexion. Removal of the syndesmotic screw was routinely done by most surgeons, mainly because of the limitation of movement and risk of screw breakage. Factors that affect suture button selection included non-rigid fixation which enables adequate fixation, early weight-bearing, and an infrequent need to remove the hardware. Inadequate reduction was considered the main factor that affects poor prognosis. Conclusion: This study proposes updated information about the current trends in the management of syndesmotic injuries in Korea. Consensuses in both the diagnostic and therapeutic approach to patients with syndesmotic injury were identified in this survey study. This study may raise the awareness of the various possible approaches toward the injury and should be used to further establish a standard protocol for the management of syndesmotic injuries.

Evaluation method for interoperability of weapon systems applying natural language processing techniques (자연어처리 기법을 적용한 무기체계의 상호운용성 평가방법)

  • Yong-Gyun Kim;Dong-Hyen Lee
    • Journal of The Korean Institute of Defense Technology
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    • v.5 no.3
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    • pp.8-17
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    • 2023
  • The current weapon system is operated as a complex weapon system with various standards and protocols applied, so there is a risk of failure in smooth information exchange during combined and joint operations on the battlefield. The interoperability of weapon systems to carry out precise strikes on key targets through rapid situational judgment between weapon systems is a key element in the conduct of war. Since the Korean military went into service, there has been a need to change the configuration and improve performance of a large number of software and hardware, but there is no verification system for the impact on interoperability, and there are no related test tools and facilities. In addition, during combined and joint training, errors frequently occur during use after arbitrarily changing the detailed operation method and software of the weapon/power support system. Therefore, periodic verification of interoperability between weapon systems is necessary. To solve this problem, rather than having people schedule an evaluation period and conduct the evaluation once, AI should continuously evaluate the interoperability between weapons and power support systems 24 hours a day to advance warfighting capabilities. To solve these problems, To this end, preliminary research was conducted to improve defense interoperability capabilities by applying natural language processing techniques (①Word2Vec model, ②FastText model, ③Swivel model) (using published algorithms and source code). Based on the results of this experiment, we would like to present a methodology (automated evaluation of interoperability requirements evaluation / level measurement through natural language processing model) to implement an automated defense interoperability evaluation tool without relying on humans.

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A Study on the Influence of Information Security on Consumer's Preference of Android and iOS based Smartphone (정보보안이 안드로이드와 iOS 기반 스마트폰 소비자 선호에 미치는 영향)

  • Park, Jong-jin;Choi, Min-kyong;Ahn, Jong-chang
    • Journal of Internet Computing and Services
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    • v.18 no.1
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    • pp.105-119
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    • 2017
  • Smartphone users hit over eighty-five percentage of Korean populations and personal private items and various information are stored in each user's smartphone. There are so many cases to propagate malicious codes or spywares for the purpose of catching illegally these kinds of information and earning pecuniary gains. Thus, need of information security is outstanding for using smartphone but also user's security perception is important. In this paper, we investigate about how information security affects smartphone operating system choices by users. For statistical analysis, the online survey with questionnaires for users of smartphones is conducted and effective 218 subjects are collected. We test hypotheses via communalities analysis using factor analysis, reliability analysis, independent sample t-test, and linear regression analysis by IBM SPSS statistical package. As a result, it is found that hardware environment influences on perceived ease of use. Brand power affects both perceived usefulness and perceived ease of use and degree of personal risk-accepting influences on perception of smartphone spy-ware risk. In addition, it is found that perceived usefulness, perceived ease of use, degree of personal risk-accepting, and spy-ware risk of smartphone influence significantly on intention to purchase smartphone. However, results of independent sample t-test for each operating system users of Android or iOS do not present statistically significant differences among two OS user groups. In addition, each result of OS user group testing for hypotheses is different from the results of total sample testing. These results can give important suggestions to organizations and managers related to smartphone ecology and contribute to the sphere of information systems (IS) study through a new perspective.

The Development of the Manipulator and End-effector of Automated Pavement Crack Sealing Machine and Movement Test (도로면 크랙실링 자동화 장비의 모체 제작 및 구동 실험)

  • Lee, Jeong-Ho;Lee, Won-Jae;Yoo, Hyun-Seok;Kim, Young-Suk
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.32 no.4D
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    • pp.377-386
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    • 2012
  • Crack sealing has been widely used in the pavement maintenance due to its advantage of repairing the cracks at the preliminary stages. However, it has been analyzed that the crack sealing work process is dangerous and labor intensive. Moreover, quality and productivity of crack sealing work are highly depended on labor experience and skills. Therefore, various crack sealing machines have been researched but revealed many limitations in practical application. This research analyses conventional crack sealing work process and previously developed crack sealing machines in order to develop an automated pavement crack sealing machine which can be practically and widely applied in the construction fields. This paper develops the previously proposed conceptual design by drawing detailed designs and fabricating the hardware(manipulator and end-effector) of the automated pavement crack sealing machine. The crack sealing machine suggested in this paper overcomes limitations of existing crack sealing machines and designed to meet the domestic road conditions and regulations. It is expected that automating the conventional crack sealing method contributes to the improvement of quality, economy and reduce accidents.

Implementation of WLAN Baseband Processor Based on Space-Frequency OFDM Transmit Diversity Scheme (공간-주파수 OFDM 전송 다이버시티 기법 기반 무선 LAN 기저대역 프로세서의 구현)

  • Jung Yunho;Noh Seungpyo;Yoon Hongil;Kim Jaeseok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.5 s.335
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    • pp.55-62
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    • 2005
  • In this paper, we propose an efficient symbol detection algorithm for space-frequency OFDM (SF-OFDM) transmit diversity scheme and present the implementation results of the SF-OFDM WLAN baseband processor with the proposed algorithm. When the number of sub-carriers in SF-OFDM scheme is small, the interference between adjacent sub-carriers may be generated. The proposed algorithm eliminates this interference in a parallel manner and obtains a considerable performance improvement over the conventional detection algorithm. The bit error rate (BER) performance of the proposed detection algorithm is evaluated by the simulation. In the case of 2 transmit and 2 receive antennas, at $BER=10^{-4}$ the proposed algorithm obtains about 3 dB gain over the conventional detection algorithm. The packet error rate (PER), link throughput, and coverage performance of the SF-OFDM WLAN with the proposed detection algorithm are also estimated. For the target throughput at $80\%$ of the peak data rate, the SF-OFDM WLAN achieves the average SNR gain of about 5.95 dB and the average coverage gain of 3.98 meter. The SF-OFDM WLAN baseband processor with the proposed algorithm was designed in a hardware description language and synthesized to gate-level circuits using 0.18um 1.8V CMOS standard cell library. With the division-free architecture, the total logic gate count for the processor is 945K. The real-time operation is verified and evaluated using a FPGA test system.

Dual-mode Pseudorandom Number Generator Extension for Embedded System (임베디드 시스템에 적합한 듀얼 모드 의사 난수 생성 확장 모듈의 설계)

  • Lee, Suk-Han;Hur, Won;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.95-101
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    • 2009
  • Random numbers are used in many sorts of applications. Some applications, like simple software simulation tests, communication protocol verifications, cryptography verification and so forth, need various levels of randomness with various process speeds. In this paper, we propose a fast pseudorandom generator module for embedded systems. The generator module is implemented in hardware which can run in two modes, one of which can generate random numbers with higher randomness but which requires six cycles, the other providing its result within one cycle but with less randomness. An ASIP (Application Specific Instruction set Processor) was designed to implement the proposed pseudorandom generator instruction sets. We designed a processor based on the MIPS architecture,, by using LISA, and have run statistical tests passing the sequence of the Diehard test suite. The HDL models of the processor were generated using CoWare's Processor Designer and synthesized into the Dong-bu 0.18um CMOS cell library using the Synopsys Design Compiler. With the proposed pseudorandom generator module, random number generation performance was 239% faster than software model, but the area increased only 2.0% of the proposed ASIP.

A Study On RTLS(Real Time Location System) Based on RSS(Received Signal Strength) and RSS Characteristics Analysis with the External Factors (외적요인에 따른 RSS 특성 분석과 이를 이용한 실시간 위치 추적 시스템 구현에 관한 연구)

  • Lee, Seung-Ho
    • Journal of IKEEE
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    • v.15 no.1
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    • pp.76-85
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    • 2011
  • In this paper, we analysed RSS characteristics by external factors and presented an efficient algorithm for real-time location tracking and its hardware system. The proposed algorithm enhanced the ranging accuracy using Kalman Filter based on the RSS DB. The location tracking system that consists of the tag, AP(Access Point), a data collector(Data Receiver) with IEEE 802.15.4(ZigBee) network environment, and location tracking application that reveal locations of each tag is implemented for the test environment. The location tracking system presented in this paper is implemented with MSP430 microprocessor manufactured by TI(Texas Instrument), CC2420 RF chipset and the location tracking application. With the results of the experiment, the proposed algorithm and the system can achieve the efficiency and the accuracy of location tracking with the average error of 19.12cm, and its standard deviation of 5.31cm in outdoor circumstance. Also, the experimental result shows that exact tracking of position in indoor circumstance cannot achieve because of vulnerable RSS with external circumstance.

Design of Real-Time PreProcessor for Image Enhancement of CMOS Image Sensor (CMOS 이미지 센서의 영상 개선을 위한 실시간 전처리 프로세서의 설계)

  • Jung, Yun-Ho;Lee, Joon-Hwan;Kim, Jae-Seok;Lim, Won-Bae;Hur, Bong-Soo;Kang, Moon-Gi
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.8
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    • pp.62-71
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    • 2001
  • This paper presents a design of the real-time digital image enhancement preprocessor for CMOS image sensor. CMOS image sensor offers various advantages while it provides lower-quality images than CCD does. In order to compensate for the physical limitation of CMOS sensor, the spatially adaptive contrast enhancement algorithm was incorporated into the preprocessor with color interpolation, gamma correction, and automatic exposure control. The efficient hardware architecture for the preprocessor is proposed and was simulated in VHDL. It is composed of about 19K logic gates, which is suitable for low-cost one-chip PC camera. The test system was implemented on Altera Flex EPF10KGC503-3 FPGA chip in real-time mode, and performed successfully.

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The Performance Analysis of GPU-based Cloth simulation according to the Change of Work Group Configuration (워크 그룹 구성 변화에 따른 GPU 기반 천 시뮬레이션의 성능 분석)

  • Choi, Young-Hwan;Hong, Min;Lee, Seung-Hyun;Choi, Yoo-Joo
    • Journal of Internet Computing and Services
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    • v.18 no.3
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    • pp.29-36
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    • 2017
  • In these days, 3D dynamic simulation is closely related to many industries. In the past, physically-based 3D simulation was used mainly in the car crash or construction related fields, but it also plays an important role in movies or games today. Many mathematical computations are needed to represent the 3D object realistically, but it is difficult to process a large amount of calculations for simulation of application based on CPU in real-time. Recently, with the advanced graphic hardware and improved architecture, GPU can be utilized for the general purposes of computation function as well as graphic computation. Many approaches using GPU have been applied for various research fields. In this paper, we analyze the performance variation of two cloth simulation algorithms based on GPU according to the change of execution properties of GPU shaders in oder to optimize the performance of GPU-based cloth simulation. Cloth simulation is implemented by the spring centric algorithm and node centric algorithm with GPU parallel computing using compute shader of GLSL 4.3. We compare the performance of between these algorithms according to the change of the size and dimension of work group. The experiment is repeated to 10 times during 5,000 frames for each test and experimental results are provided by averaging of FPS. The experimental result shows that the node centric algorithm is executed in higher speed than the spring centric algorithm.