• 대한전자공학회논문지SD
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• 제48권8호
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• pp.18-24
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• 2011

칩의 적층 기술이 적용된 TSV기반 3D IC로 진화함에 따라 새로운 문제점이 발생하게 되었다. Bonding 이후 다이간 TSV가 제대로 연결되었는지 테스트하지만 Redundnacy TSV에 대해서는 테스트하지 않는다. 그러나 더 높은 수율을 얻기 위해서는 redundancy TSV에 대한 연결 테스트를 수행해야 한다. redundancy TSV의 연결을 테스트하고 진단하여 고장 있는 TSV를 대체함으로써 더 높은 수율을 얻을 수 있다. 본 논문에서는 TSV기반 3D IC에서 다이간의 TSV 연결 테스트뿐 아니라 redundancy TSV 테스트를 위한 래퍼셀을 제안하고자 한다. 제안하는 래퍼셀은 하드웨어로 설계하였을 시 기존의 테스트패턴을 그대로 사용할 수 있고, 소프트웨어 설계 시에는 면적을 최소화할 수 있다.

• 시스템엔지니어링학술지
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• 제14권2호
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• pp.41-48
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• 2018

This paper describes the systems engineering development process for the Departure from Nucleate Boiling Ratio (DNBR) algorithm using FPGA. Current Core Protection Calculator System (CPCS) requirement and DNBR logic are analyzed in the reverse engineering phase and the new FPGA based DNBR algorithm is designed in the re-engineering phase. FPGA based DNBR algorithm is developed by VHSIC Hardware Description Language (VHDL) in the implementation phase and VHDL DNBR software is verified in the software Verification & Validation phase. Test cases are developed to perform the software module test for VHDL software modules. The APR 1400 simulator is used to collect the inputs data in 100%, 75%, and 50% reactor power condition. Test input signals are injected to the software modules following test case tables and output signals are compared with the expected test value. Minimum DNBR value from developed DNBR algorithm is validated by KEPCO E&C CPCS development facility. This paper summarizes the process to develop the FPGA-based DNBR calculation algorithm using systems engineering approach.

• 한국자동차공학회논문집
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• 제17권5호
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• pp.127-132
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• 2009

The transient performance of the passenger diesel engine equipped with the variable geometry turbocharger was simulated using HIL(hardware-in-the-loop) system. The system consists of engine model as software, and the turbocharger test bench as hardware. The engine model is mean value model which is programmed by the Simulink of the Mathworks. The turbocharger test bench is composed of a blower, some sensors, and DAQ boards. A real time simulation is possible since the operating system based on the real time is included. The results show the good response for the transient characteristics. Therefore this HIL system can be used for development of the new turbocharger effectively.

• 산업기술연구
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• 제28권B호
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• pp.111-116
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• 2008

Since the hydraulic fracturing field testing method was introduced first to Korean geotechnical engineers in 1994, there have been lots of progresses in a hardware system as well as an interpretation tool. The hydrofracturing system of first generation was the pipe-line type, and it has been developed to a wire-line system at their second generation. The current up-to-date system is more compact and is able to be operated by all-in-one system. With a progress in a hardware system, the software for analyzing in-situ stress regime has also been progressed. The shut-in pressure, which is the most ambiguous parameter to be obtained from hydrofracturing pressure curves, can now be acquired automatically from the various methods. While the hardware and software for hydrofracturing tests are being developed during the last decade, the author could accumulate the field test results which can cover the almost whole area of South Korea. Currently these field data are used widely in a feasibility study or a preliminary design step for tunnel construction in Korea. Regarding the difficulties in a site selection and a test performance for the in-situ stress measurement at an off-shore area, the in-situ stress regime obtained from the field experiences in the land area can be used indirectly for the design of a sub-sea tunnel. From the hydrofracturing stress measurements, the trend of magnitude and direction of in-situ stress field was shown identically with the geological information in Korea.

• 항공우주기술
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• 제2권1호
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• pp.73-79
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• 2003

대부분의 위성 설계에서 우주 방사선에 의한 메모리 데이터 보호를 위해 오류정정회로를 내장하며, 동시에 오류의 누적을 방지하기 위해 주기적으로 메모리 내용을 읽는 알고리즘을 적용하고 있다. 소프트웨어에 의한 읽기 알고리즘을 적용하는 KOMPSAT 2호기의 경우 메모리 소자에 대한 방사능 영향 시험을 수행하지 않아 1호기에 비해 다소 큰 오류 가능성이 예측되었다. 소프트웨어 알고리즘 변경으로 읽기 작업을 하도록 결정하였으나 하드웨어에 의해 더 빠른 속도로 오류를 정정하도록 하는 방법도 연구되었다. 본 논문은 이러한 연구 결과로서, 최소 1.88분 정도의 주기로 1 Gbits의 메모리 영역을 읽음으로서 하드웨어만으로 메모리 내용을 보존할 수 있는 방법에 대하여 논의하였다.

• 대한기계학회논문집A
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• 제24권12호
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• pp.2883-2890
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• 2000

In this study, a Hardware-In-The-Loop-Simulation(HILS) system for developing a Electric-Power-Steering(EPS) system is designed. To test a EPS by HILS system, a mathematical vehicle model with a steering system model has been constructed. This mathematical model has been constructed. This mathematical model has been downloaded to the Digital-Signal-Processor(DSP) board. To realize the lateral force acting on the front wheel in a real car. the steering wheel angle sensor and vehicle velocity have been used for input signal. The force sensor has been used for a feedback signal. The full vehicle states could by simulated by the HILS system. Consequently, the HILS system could by used to analyze control-parameters of a EPS that contributes to the maneuverability and stability of a vehicle. At the same time, the HILS system can evaluate the whole performance of the vehicle-steering system. Also the HILS system could do test could not be executed in real vehicle. The HILs system will useful for developing the control logic for the EPS system.

• 한국해양공학회:학술대회논문집
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• 한국해양공학회 2006년 창립20주년기념 정기학술대회 및 국제워크샵
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• pp.319-322
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• 2006

The Deep-sea miner system is composed of body, actuators, sensors, and devices for control and monitoring. At present, we are manufacturing the miner's body included actuators and already consisted with off-the-shelf embedded controller. But sensors and those devices were just determined. To previously test performance of embedded controller which manages control and monitoring of miner system, its simulator must be developed for control and monitoring. Hardware-In-the-Loop(HIL) simulation is being increasingly used in industrial applications. This is an effective tool for the evaluation of electric system and drives. In the HIL simulator, we can test and design the control and monitoring system freely without the risk of hardware ruins and the load of expenses. Also the programming software for miner operating is verified on the HIL simulator. In this paper, we introduce the concept of HIL simulator for control and monitoring of deep-sea miner.

• Wind and Structures
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• 제17권6호
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• pp.629-646
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• 2013

One of the most common solutions adopted to reduce vibrations of skyscrapers due to wind or earthquake action is to add external damping devices to these structures, such as a TMD (Tuned Mass Damper) or TLCD (Tuned Liquid Column Damper). It is well known that a TLCD device introduces on the structure a nonlinear damping force whose effect decreases when the amplitude of its motion increases. The main objective of this paper is to describe a Hardware-in-the-Loop test able to validate the effectiveness of the TLCD by simulating the real behavior of a tower subjected to the combined action of wind and a TLCD, considering also the nonlinear effects associated with the damping device behavior. Within this test procedure a scaled TLCD physical model represents the hardware component while the building dynamics are reproduced using a numerical model based on a modal approach. Thanks to the Politecnico di Milano wind tunnel, wind forces acting on the building were calculated from the pressure distributions measured on a scale model. In addition, in the first part of the paper, a new method for evaluating the dissipating characteristics of a TLCD based on an energy approach is presented. This new methodology allows direct linking of the TLCD to be directly linked to the increased damping acting on the structure, facilitating the preliminary design of these devices.

• Journal of Power Electronics
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• 제11권4호
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• pp.471-478
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• 2011

This paper addresses the establishment of a kVA-range plug-in hybrid electrical vehicle (PHEV) integration test platform and associated issues. Advancements in battery and power electronic technology, hybrid vehicles are becoming increasingly dependent on the electrical energy provided by the batteries. Minimal or no support by the internal combustion engine may result in the vehicle being occasionally unable to recharge the batteries during highly dynamic driving that occurs in urban areas. The inability to sustain its own energy source creates a situation where the vehicle must connect to the electrical grid in order to recharge its batteries. The effects of a large penetration of electric vehicles connected into the grid are still relatively unknown. This paper presents a novel methodology that will be utilized to study the effects of PHEV charging at the sub-transmission level. The proposed test platform utilizes the power hardware-in-the-loop (PHIL) concept in conjunction with high-fidelity PHEV energy system simulation models. The battery, in particular, is simulated utilizing a real-time digital simulator ($RTDS^{TM}$) which generates appropriate control commands to a power electronics-based voltage amplifier that interfaces via a LC-LC-type filter to a power grid. In addition, the PHEV impact is evaluated via another power electronic converter controlled through $dSPACE^{TM}$, a rapid control systems prototyping software.

• Journal of Communications and Networks
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• 제13권1호
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• pp.70-76
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• 2011

This paper presents the unified user equipment (UE) baseband modulation and demodulation (modem) hardware platform architecture to support multiple radio access technologies. In particular, this platform selectively supports two systems; one is HEDGE system, which is the combination of third generation partnership project (3GPP) Release 7 high speed packet access evolution (HSPA+) and global system for mobile communication (GSM)/general packet radio service (GPRS)/enhanced data rates for GSM evolution (EDGE), while the other is LEDGE system, which is the combination of 3GPP Release 8 long term evolution (LTE) and GSM/GPRS/EDGE. This is done by applying the flexible pin multiplexing scheme to a hardwired pin mapping process. On the other hand, to provide stable connection, high portability, and high debugging ability, the stacking structure is employed. Here, a layered board architecture grouped by functional classifications is applied instead of the conventional one flatten board. Based on this proposed configuration, we provide a framework for the verification step in wireless cellular communications. Also, modem function/scenario test and inter-operability test with various base station equipments are verified by system requirements and scenarios.