• Title/Summary/Keyword: Hardware limitation

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Implementation of Dynamic Programming Using Cellular Nonlinear Neural Networks (셀룰라 비선형 회로망에 의한 동적계획법의 구현)

  • Park, Jin-Hee;Son, Hong-Rak;Kim, Hyong-Suk
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3060-3062
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    • 2000
  • A fast optimal path planning algorithm using the analog Cellular Nonlinear Circuits (CNC) is proposed. The proposed algorithm compute the optimal path using subgoal-based dynamic programming algorithm. In the algorithm, the optimal paths are computed regardless of the distance between the initial and the goal position. It begins to find subgoals starting from the initial position when the output of the initial cell becomes nonzero value. The suboal is set as the initial position to find the next subgoal until the final goal is reached. Simulations have been done considering the imprecise hardware fabrication and the limitation of the magnitude of input value.

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Mixed-Domain Adaptive Blind Correction of High-Resolution Time-Interleaved ADCs

  • Seo, Munkyo;Nam, Eunsoo;Rodwell, Mark
    • ETRI Journal
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    • v.36 no.6
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    • pp.894-904
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    • 2014
  • Blind mismatch correction of time-interleaved analog-to-digital converters (TI-ADC) is a challenging task. We present a practical blind calibration technique for low-computation, low-complexity, and high-resolution applications. Its key features are: dramatically reduced computation; simple hardware; guaranteed parameter convergence with an arbitrary number of TI-ADC channels and most real-life input signals, with no bandwidth limitation; multiple Nyquist zone operation; and mixed-domain error correction. The proposed technique is experimentally verified by an M = 4 400 MSPS TI-ADC system. In a single-tone test, the proposed practical blind calibration technique suppressed mismatch spurs by 70 dB to 90 dB below the signal tone across the first two Nyquist zones (10 MHz to 390 MHz). A wideband signal test also confirms the proposed technique.

Development of Equivalent Systems for the KEPCO Enhanced Power System Simulator (한전 실시간 시뮬레이터를 위한 등가계통 구성 연구)

  • Jang, Gil-Soo;Yun, Yong-Beum;Kim, Yong-Hak
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.11
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    • pp.1434-1440
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    • 1999
  • For the real-time power system analysis, there exists a limitation to the scale of the system to be simulated, hence it is necessary for the real-time simulation to develop reduced equivalent systems which preserve the desired property of the original system. In this paper, a procedure for developing an equivalent system whose scale is reduced within the hardware capacity of a real-time simulator is proposed. Also, the proposed procedure is applied to a KEPCO's system. The comparison between the original system and equivalent systems illustrates the capabilities of the proposed procedure.

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Reduction of Number of Actuators for Independent Modal Space Control (독립모달공간 제어기법에서 작동기 수의 절감에 대한 연구)

  • 황재혁;김준수;박명호
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 1996.10a
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    • pp.166-174
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    • 1996
  • In this paper, a new modified independent modal space control(IMSC), which relaxes the fundamental hardware limitation of IMSC, is suggested to handle the vibration and attitude control problem for flexible large structures. This method has adapted a new switching algorithm between controlled modes and a novel design technique for modal control force. The main advantage of this method is to minimize the discontinuity of the modal control forces and to assure the asymptotic stability of the closed-loop systems. This process is shown to be simple and efficient in a realistic example of vibration control of a cantilever beam. It has been found that the modified IMSC suggested in this paper, which can reduce the number of actuators, is highly excellent compared to other previous methods in terms of the performance and stability of the vibration control systems.

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Position Control of Wafer Lift Pin for the Reduction of Wafer Slip in Semiconductor Process Chamber

  • Koo, Yoon Sung;Song, Wan Soo;Park, Byeong Gyu;Ahn, Min Gyu;Hong, Sang Jeen
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.18-21
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    • 2020
  • Undetected wafer slip during the lift pin-down motion in semiconductor equipment may affect the center to edge variation, wafer warpage, and pattern misalignment in plasma equipment. Direct measuring of the amount of wafer slip inside the plasma process chamber is not feasible because of the hardware space limitation inside the plasma chamber. In this paper, we demonstrated a practice for the wafer lift pin-up and down motions with respect to the gear ratio, operating voltage, and pulse width modulation to maintain accurate wafer position using remote control linear servo motor with an experimentally designed chamber mockup. We noticed that the pin moving velocity and gear ratio are the most influencing parameters to be control, and the step-wised position control algorithm showed the most suitable for the reduction of wafer slip.

Microprocessor On-line Contents using Simulator

  • Lim, Dong Kyun;Oh, Won Geun
    • International Journal of Advanced Culture Technology
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    • v.8 no.4
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    • pp.299-305
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    • 2020
  • With the advancement of the 4th Industrial Revolution(4IR), microprocessor education is on the rise due to the explosive demand for IoT (Internet of Things) and M2M devices. However, it is difficult due to many constraints to efficiently transfer training on hardware assembly and implementation through online training. Thus, we developed a cost-effective online content based on Arduino simulations, Atmel Studio 7, and WinAvr simulator that are required for the utilization of AVR 128. These Camtasia videos overcame the limitation of theory focused on-line education by visually introducing the practical utilization of an actual AVR 128. In this paper, the proposed educational content was provided to university students, and the results of student feedback show that it has a strong effect.

RFID Authentication Protocol with Strong Resistance against Traceability and Denial of Service attack (위치 추적과 서비스 거부 공격에 강한 RFID 인증 프로토콜)

  • Kang, Jeon-Il;Nyang, Dae-Hun
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.15 no.4
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    • pp.71-82
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    • 2005
  • Though there are many authentication protocols for RFID system, only a few protocols support location privacy. Because of tag's hardware limitation, these protocols suffer from many security threats, especially from DoS (Denial of Service) attack. In this paper, we explain location privacy problem and show vulnerabilities of RFID authentication protocols. And then, we suggest an authentication protocol that is strong against location tracing, spoofing attack and DoS attack

Development of an Autonomous Situational Awareness Software for Autonomous Unmanned Aerial Vehicles

  • Kim, Yun-Geun;Chang, Woohyuk;Kim, Kwangmin;Oh, Taegeun
    • Journal of Aerospace System Engineering
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    • v.15 no.2
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    • pp.36-44
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    • 2021
  • Unmanned aerial vehicles (UAVs) are increasingly needed as they can replace manned aircrafts in dangerous military missions. However, because of their low autonomy, current UAVs can execute missions only under continuous operator control. To overcome this limitation, higher autonomy levels of UAVs based on autonomous situational awareness is required. In this paper, we propose an autonomous situational awareness software consisting of situation awareness management, threat recognition, threat identification, and threat space analysis to detect dynamic situational change by external threats. We implemented the proposed software in real mission computer hardware and evaluated the performance of situational awareness toward dynamic radar threats in flight simulations.

A Modified Steering Kernel Filter for AWGN Removal based on Kernel Similarity

  • Cheon, Bong-Won;Kim, Nam-Ho
    • Journal of information and communication convergence engineering
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    • v.20 no.3
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    • pp.195-203
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    • 2022
  • Noise generated during image acquisition and transmission can negatively impact the results of image processing applications, and noise removal is typically a part of image preprocessing. Denoising techniques combined with nonlocal techniques have received significant attention in recent years, owing to the development of sophisticated hardware and image processing algorithms, much attention has been paid to; however, this approach is relatively poor for edge preservation of fine image details. To address this limitation, the current study combined a steering kernel technique with adaptive masks that can adjust the size according to the noise intensity of an image. The algorithm sets the steering weight based on a similarity comparison, allowing it to respond to edge components more effectively. The proposed algorithm was compared with existing denoising algorithms using quantitative evaluation and enlarged images. The proposed algorithm exhibited good general denoising performance and better performance in edge area processing than existing non-local techniques.

Hardware-Software Cosynthesis of Multitask Multicore SoC with Real-Time Constraints (실시간 제약조건을 갖는 다중태스크 다중코어 SoC의 하드웨어-소프트웨어 통합합성)

  • Lee Choon-Seung;Ha Soon-Hoi
    • Journal of KIISE:Computer Systems and Theory
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    • v.33 no.9
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    • pp.592-607
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    • 2006
  • This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.