• Title/Summary/Keyword: Hardware Quality

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Excellence for Organization Quality Management Innovation Challenge -Comparison of Korea and China- (초우량 조직을 위한 품질경영혁신 도전 -한국과 중국의 비교-)

  • Kim, Gye-Soo;Xu, Da-Peng
    • Journal of Korean Society for Quality Management
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    • v.41 no.4
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    • pp.499-512
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    • 2013
  • Purpose: Quality Innovation Managements recently focus on developing relationship with customers to meet their requirements and enhance loyalty in the competitive environments in Countries. The purpose of this study is to explore the effects of innovation, quality, satisfaction and customer loyalty. Methods: After reviewing the literatures, the structural equation modeling (SEM) was conducted test the research model. The data was collected from Quality Leader by the questionnaire In Korea and China. Results: The results of SEM show that hardware innovation quality have a positive effect on customer satisfaction. Customer Satisfaction have a positive effect on customer satisfaction. Conclusion: The authors demonstrate that the hardware innovation quality is related positively to customer satisfaction. And customer satisfaction has a positive effect on customer loyalty. A number of notable findings are reported including the empirical verification that hardware innovation quality, customer satisfaction, and customer loyalty may all be directly related to business performance.

Spectral Efficiency of Full-Duplex Wireless Backhaul with Hardware Impaired Massive MIMO for Heterogeneous Cellular Networks

  • Anokye, Prince;Lee, Kyoung-Jae
    • Journal of Advanced Information Technology and Convergence
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    • v.8 no.2
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    • pp.13-25
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    • 2018
  • The paper analyzes the sum spectral efficiency (SE) for a heterogeneous cellular network (HetNet) which has the backhaul, provided with wireless full-duplex massive multiple-input multiple-out (MIMO) with hardware distortions. We derive approximate expressions to obtain the uplink/downlink sum SE of the backhaul. The analytic results have been shown to be exact when compared to Monte Carlo simulations. From the analysis, it is shown that the desired signal and the hardware distortion noise have the same order. The sum SE generally improves when the number of receive antennas increases but degrades when the hardware quality reduces. A sum SE performance ceiling is introduced by the hardware quality level.

Developing a Quality Risk Assessment Model for Product Liability Law (제조물 책임(PL)법 대응을 위한 품질 리스크 진단 모델 개발)

  • Oh, Hyung Sool
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.40 no.3
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    • pp.27-37
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    • 2017
  • As the global uncertainty of manufacturing has increased and the quality problem has become global, the recall has become a fatal risk that determines the durability of the company. In addition, as the convergence of PSS (product-service system) product becomes common due to the development of IT convergence technology, if the function of any part of hardware or software does not operate normally, there will be a problem in the entire function of PSS product. In order to manage the quality of such PSS products in a stable manner, a new approaches is needed to analyze and manage the hardware and software parts at the same time. However, the Fishbone diagram, FTA, and FMEA, which are widely used to interpret the current quality problem, are not suitable for analyzing the quality problem by considering the hardware and software at the same time. In this paper, a quality risk assessment model combining FTA and FMEA based on defect rate to be assessed daily on site to manage quality and fishbone diagram used in group activity to solve defective problem. The proposed FTA-FMEA based risk assessment model considers the system structure characteristics of the defect factors in terms of the relationship between hardware and software, and further recognizes and manages them as risk. In order to evaluate the proposed model, we applied the functions of ITS (intelligent transportation system). It is expected that the proposed model will be more effective in assessing quality risks of PSS products because it evaluates the structural characteristics of products and causes of defects considering hardware and software together.

Embedded Hardware Tests for a Distributed Power Quality Monitoring System (분산전원 전력품질 모니터링 시스템을 위한 임베디드 하드웨어 테스트)

  • Shin, Myong-Jun;Kim, Sung-Jong;Son, Young-Ik
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.151-153
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    • 2006
  • When distributed powers are interconnected to the grid, lack of source stability may cause some events that should be measured and stored as soon as they occur. This paper presents a real-time hardware system that has been developed for quick and reliable monitoring of the distributed powers quality. The system is composed of a digital signal processor (MPC7410, Motorola) and a 16 bits A/D board (VMIVME3122, GE). To guarantee the real time operation, it is based on a real time OS (VxWorks). Hardware tests of the embedded system have been made to check the performances of the proposed system. Test signals of several events are generated by using a LabView (hardware) system. The tests show that the system complies with the desired IEEE standard for power quality monitoring.

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Rehabilitation assistive technology in adaptation to disabled job Effect on the use of research (장애인 직무적응에 대한 재활보조공학 이용 효과 연구)

  • Jeong, S.H.
    • Journal of rehabilitation welfare engineering & assistive technology
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    • v.7 no.1
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    • pp.59-66
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    • 2013
  • This study rehabilitation assistive technology system for people with disabilities employed by a company in the field of occupations and job satisfaction have adapted to, and for the rehabilitation assistive technology support(rehabilitation assistive technology hardware and the software) and service quality based on the quality of convenient for employees to work life by analyzing the factors that can act on adaptation employees on behavioral intentions was to determine the overall impact. Seoul, Gyeonggi, Incheon companies based in vocational education and training received in the employment of the disabled subject questionnaires were distributed, and finally 594 valid questionnaires were minor. In order to test the hypothesis SEM(structural equation model) were used, the results of this study can be summarized as follows. First, rehabilitation assistive technology hardware quality of the quality of rehabilitation assistive technology software affected. Second, rehabilitation assistive technology software quality on the quality of the service quality affected. Third, rehabilitation assistive technology hardware quality on the quality of the service quality affected. Fourth, quality of service, the quality of the adaptation of action for employees affected also. Fifth, rehabilitation assistive technology software for adaptive quality of the employees also had an impact on behavior. Sixth, rehabilitation assistive technology hardware to adapt the quality of the employees affected. And parameters (quality of service quality) influenced to as indirect effects. The results of this study support the rehabilitation assistive technology and rehabilitation assistive technology hardware and software) based, quality of service and quality of fused form acceptable to, the degree of action for employees to adapt more implications that may affect have provided.

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Hardware-Aware Rate Monotonic Scheduling Algorithm for Embedded Multimedia Systems

  • Park, Jae-Beom;Yoo, Joon-Hyuk
    • ETRI Journal
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    • v.32 no.5
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    • pp.657-664
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    • 2010
  • Many embedded multimedia systems employ special hardware blocks to co-process with the main processor. Even though an efficient handling of such hardware blocks is critical on the overall performance of real-time multimedia systems, traditional real-time scheduling techniques cannot afford to guarantee a high quality of multimedia playbacks with neither delay nor jerking. This paper presents a hardware-aware rate monotonic scheduling (HA-RMS) algorithm to manage hardware tasks efficiently and handle special hardware blocks in the embedded multimedia system. The HA-RMS prioritizes the hardware tasks over software tasks not only to increase the hardware utilization of the system but also to reduce the output jitter of multimedia applications, which results in reducing the overall response time.

Analysis of the Causes of Defects in Fenestration Construction and Their Impacts on Construction Quality - Focused on Door Hardware - (창호철물공사 하자발생 원인과 시공품질 영향분석에 관한 연구 - 문(Door)에 사용되는 창호철물 중심으로 -)

  • Moon, Sang-Deok;Chung, Jae-Min;Ock, Jong-Ho
    • Journal of the Korea Institute of Building Construction
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    • v.13 no.4
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    • pp.341-350
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    • 2013
  • For this study, a series of interviews with engineers in the Korean construction industry was carried out through a formal workshop format to analyze the causes of the inferior quality of builders' hardware. The authors established the causes of defects in window hardware construction in relation to the three aspects of system, design, and construction as involving the following seven factors: lack of system (including low ability to create construction specifications); low social awareness of the importance of window hardware; low technical capability to create design drawings; low design costs; small manufacturing capacity; low construction cost; and short duration of construction. Among the seven causes, the biggest cause of defects in window hardware construction is the lack of a system (low ability to create construction specifications), followed by low technical capability to create design drawings. In addition, this study carried out basic research to create measures to prevent defects in window hardware construction by analyzing how such causes of defects are distributed depending on the scale of architectural firms and construction companies during actual projects.

Hardware Design of Real-Time Wide Dynamic Range Algorithm Based on Tone Mapping Method for Image Quality Enhancement (영상 품질 향상을 위한 색 사상 기반 실시간 광역역광보정 알고리즘의 하드웨어 설계)

  • Kim, Geun-Jun;Kang, Bongsoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.2
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    • pp.270-275
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    • 2018
  • Method for improving the image quality are divided into a tone mapping method and a retinex theory based method. Typical example of the image quality enhancement method using tone mapping method is one using image characteristics like histogram. In this paper, we propose a hardware design of real-time wide dynamic range algorithm based on tone mapping method for image quality enhancement. The proposed method divides the image into the luminance and chroma components and then improves the chroma region based on the variation of the luminance component. Adding to that, it is designed to be compatible with the existing 8-bit signal, using high quality image with 12-bit extended signal according to the desired flow. As a result of simulation, it is confirmed that the image quality is improved, and the hardware design is confirmed that the real-time operations is possible at the maximum frequency at 138.26MHz.

A Methodology for Estimating Optimum Hardware Capacity E-learning System Development (E-러닝시스템 구축 프로젝트의 적정 하드웨어 산정방법론 연구)

  • Jung, Ji-Young;Baek, Dong-Hyun
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.34 no.3
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    • pp.49-56
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    • 2011
  • Estimating optimum hardware capacity of an e-learning system is very important process to grasp reasonable size of designing technique architecture and budget during step of ISP(information strategic planning) and development. It hugely influences cost and quality of the whole project. While investment on information system hardware has been continuously increased, there was no certified hardware capacity estimating method in e-learning system development. A guideline for hardware sizing of information systems was established by Telecommunication Technology Association in 2008. However, the guideline is not appropriate for estimating optimum hardware capacity of an e-learning system because it was designed to provide general standards for estimating hardware capacity of various types of projects. The purpose of this paper is to provide a methodology for estimating optimum hardware capacity in e-learning system development. To develop the methodology, this study, first of all, analyzes two e-learning development projects, in which the guideline was applied to estimate optimum hardware capacity. Then, this study finds out several key factors influencing on hardware capacity. Finally, this study suggests a methodology for estimating optimum hardware capacity of an e-learning system, in which weights for the factors are determined through AHP analysis.

Analysis of Research and Development Efficiency of Artificial Intelligence Hardware of Global Companies using Patent Data and Financial data (특허 데이터 및 재무 데이터를 활용한 글로벌 기업의 인공지능 하드웨어 연구개발 효율성 분석)

  • Park, Ji Min;Lee, Bong Gyou
    • Journal of Korea Multimedia Society
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    • v.23 no.2
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    • pp.317-327
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    • 2020
  • R&D(Research and Development) efficiency analysis is a very important issue in academia and industry. Although many studies have been conducted to analyze R&D(Research and Development) efficiency since the past, studies that analyzed R&D(Research and Development) efficiency considering both patentability and patent quality efficiency according to the financial performance of a company do not seem to have been actively conducted. In this study, measuring the patent application and patent quality efficiency according to financial performance, patent quality efficiency according to patent application were applied to corporate groups related to artificial intelligence hardware technology defined as GPU(Graphics Processing Unit), FPGA(Field Programmable Gate Array), ASIC(Application Specific Integrated Circuit) and Neuromorphic. We analyze the efficiency empirically and use Data Envelopment Analysis as a measure of efficiency. This study examines which companies group has high R&D(Research and Development) efficiency about artificial intelligence hardware technology.