• 제목/요약/키워드: Hardware In The Loop

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Navigation Computer Design of RPV Uusing GPS (GPS를 이용한 무인항공기의 항법장치 설계)

  • 선병찬;탁민제
    • 제어로봇시스템학회:학술대회논문집
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    • 1993.10a
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    • pp.308-313
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    • 1993
  • In this paper, the navigation computer design of RPV(remotely piloted vehicle) using GPS is investigated, and its hardware and software structures are described. The proposed hardware adopts the common PC configuration by using 5016A micro PC card and software is divided into several modules such as navigation module, guidance module and control module, etc. The performance of the navigation computer is verified through PILS(process in the loop simulation).

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An Antilock Brake Controller Design Using Hardware In-the Loop Simulation (Hardware In-the Loop Simulation을 이용한 미끄럼방지 제동제어기의 설계)

  • Lee, Ki-Chang;Jeon, Jung-Woo;Hwang, Don-Ha;Lee, Se-Han;Kim, Yong-Joo
    • Proceedings of the KIEE Conference
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    • 2004.07d
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    • pp.2320-2322
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    • 2004
  • 전자제어식 미끄럼방지 제동장치 (ABS, Antilock Brake System)는 차량의 급제동시 발생할 수 있는 바퀴의 슬립을 방지하여 차량의 제동거리를 단축시키고 주행 성능을 향상시키는 차량 내 안전장치이다. 지난 몇 년 동안 공압식 제동시스템을 사용하는 대형차량에 적합한 미끄럼방지 제동 제어기를 연구해 왔다. 이 제어기는 바퀴의 슬립율과 그 변화량을 이용한 제어 법칙을 유도하여, 제어 파라미터로 사용하고 있다. 이러한 제어 파라미터의 튜닝에는 맡은 반복적인 실험이 요구된다. 이러한 요구에 부응하기 위하여 차량의 제동을 실시간으로 모사 할 수 있는 HILS (Hardware In-the Loop Simulation) 시스템을 개발, 구축하였다. 개발 HILS는 공압식 브레이크 시스템 및 14 자유도를 가지는 차량 동역학 모델 및 타이어-바퀴 동역학을 소프트웨어 모델로 사용하고, 개발 중인 전자제어식 미끄럼 방지 제동 제어기를 하드웨어로 사용하여, 바퀴속도 센서 신호 모의 장치 및 공압 엑추에이터 모의 신호등의 인터페이스 장치를 사용하여 제동중인 차량의 상태를 실시간으로 시뮬레이션 및 감시할 수 있다. 이 개발 HILS를 이용하여 제동 제어기의 제어 파라미터의 튜닝을 짧은 시간에 성공적으로 끝낼 수 있었을 뿐만 아니라, HILS 실험을 마친 제어기는 미끄럼 방지 제동 시험장에서 실차 주행 시험을 무사히 마침으로써, 개발 기간과 비용을 절감할 수 있는 하드웨어를 이용하는 시뮬레이션의 효용성을 간접적으로 증명하였다.

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Enhancing the Accuracy for the Open-loop Resolver to Digital Converters

  • Karabeyli, Fikret Anil;Alkar, Ali Ziya
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.192-200
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    • 2018
  • In this study, improvements for error correction, speed, position, and rotation calculation algorithms have been proposed to be used in resolver to digital conversion (RDC) systems. The proposed open-loop system drives the resolver and uses the output signals of the resolver signal to estimate the real time position, the instant speed, and the rotation count with high resolution and accuracy even at high speeds and noise. The proposed solution implements strong features of both closed and open loop based systems while eliminating their weak points. The improvements proposed is resistant to noise owing to digital FIR filter and data averaging techniques. The implementation used for proof of concept is implemented on a hardware using an FPGA and configurable to be used by any resolver.

A Real Time HILS of the Guidance Flight System (시선지령 유도 비행체의 실시간 실물 시뮬레이션 기법)

  • 김영주;이종하
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.4
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    • pp.638-647
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    • 1994
  • This paper describes the real time Hardware-In-the Loop Simulation(HILS) that is an efective tool for design, testing and performance evaluation of the guidanc eflight system. The real time HILS was performed by using a 3-axis flight motion simulator, real time computer, I/O system and flight control system hardware along with the assumed flight trajectory of the guidance flight system. Also, we proved the validity of the real time HILS is the guidance flight system by comparing its simulation results with the software simulation data and telemetry data.

Design and Measurement of Controller for Paralleling Step-down Converter (강압형 병렬 컨버터의 제어기 설계 및 검증)

  • Park, Sung-Woo;Yoon, Hee-Kwang;Park, Hee-Sung;Jang, Jin-Beak;Lee, Sang-Kon
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2009.05a
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    • pp.449-452
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    • 2009
  • Optimized controller design for converters are very important because control-loop characteristics of converters determine the dynamic performances of converters. In addition, verification process of the control-loop characteristics by simulation and measurement with real hardware is sure to be performed after all parameters for controller and main power-stage are fixed. In this paper, general process for designing outer-loop controller of paralleling step-down converter is described. Simulation results are also contained for verifying validity of controller design results. Finally, voltage control-loop measurement method is explained and results are compared with simulation outputs.

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A Real time Simulation for Performance Analysis of Flight Control System (비행체 제어장치의 성능 해석을 위한 실시간 시뮬레이션)

  • 곽병철;박양배
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.35 no.10
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    • pp.458-464
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    • 1986
  • This paper introduces a method for design verification and performance evaluation of flight control system. The method is a real time hardware in the loop simulation using the hybrid computer and motion table facility. As a typical illustration, a roll control system of flight vehicle is applied. The simulation validity is demonstrated by comparing hardware test results with analog simulation results.

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A study on Power Quality Recognition System using Wavelet Transformation and Neural Networks (웨이블릿 변환과 신경회로망을 이용한 전력 품질 인식 시스템에 관한 연구)

  • Chong, Won-Yong;Gwon, Jin-Soo
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.2
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    • pp.169-176
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    • 2010
  • Nonstationary power quality(PQ) signals which the Sag, Swell, Impulsive Transients, and Harmonics make sometimes the operations of the industrial power electronics equipment, speed and motion controller, plant process control systems in the undesired environments. So, this PQ problem might be critical issues between power suppliers and consumers. Therefore, We have studied the PQ recognition system in order to acquire, analyze, and recognize the PQ signals using the software, i.e, MATLAB, Simulink, and CCS, and the hardware. i.e., TMS320C6713DSK(TI), The algorithms of the PQ recognition system in the Wavelet transforms and Backpropagation algorithms of the neural networks. Also, in order to verify the real-time performances of the PQ recognition system under the environments of software and hardware systems, SIL(Software In the Loop) and PIL(Processor In the Loop) were carried out, resulting in the excellent recognition performances of average 99%.

Comparison of Control Performance according to the Injection Voltage Waveform of the Harmonic Voltage Injection Sensorless Technique (주입 전압파형의 형상에 따른 고조파 주입 센서리스 기법의 제어 성능 비교)

  • Moon, Kyeong-Rok;Lee, Dong-Myung
    • Journal of IKEEE
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    • v.26 no.1
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    • pp.43-49
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    • 2022
  • This paper compares the sensorless control performance according to the applied voltage waveform by injecting sinusoidal, triangular, and square waveform in the harmonic injection sensorless control method. By injecting various voltage shape waveform with a frequency of 1kHz, the error amount of the estimated angle for each waveform is compared and analyzed. For the experiment, the HILS(hardware in the loop simulation) system was used. The hardware is the control board, and the inverter and motor models implemented in Simulik are located in the real-time simulator. The control algorithm is implemented by the FPGA control board, which includes a PWM interrupt service routine with a frequency of 10 kHz, harmonic injection and position detection sensorless algorithm.

Throughput Improvement and Power-Interruption Consideration of Fly-By-Wire Flight Control Computer (비행제어 컴퓨터의 Throughput 향상 및 Power-Interuption 대처 설계)

  • Lee, Cheol;Seo, Joon-Ho;Ham, Heung-Bin;Cho, In-Je;Woon, Hyung-Sik
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.35 no.10
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    • pp.940-947
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    • 2007
  • For the performance upgrade of a supersonic jet fighter, the processor and FLCC(Flight Control Computer) Architecture were upgraded from a baseline FLCC. Prior to the hardware implementation phase, the exact CPU throughput estimation is necessary. For this purpose, an experimental method for new FLCC throughput estimation was introduced in this study. While baseline FLCC operating, the CPU address bus was collected with logic analyzer, and then decoded to get the exact access times to each memory-memory and the number of program Instruction branches. Based on these data, a throughput test in CPU demo-board of the new FLCC configuration was performed. From test results, the CPU-Memory architecture was design-changed before FLCC hardware implementation phase. To check the flight stability degradation due to power-interrupt problem due to CPU-Memory architecture change, the piloted HILS (Hardware-In-the Loop Simulator) test was conducted.

Hardware Implementation of Radio Port Controller System for Wireless Local Loop Radio Network (무선 가입자망의 기지국 제어기 시스템 하드웨어 구현)

  • Koo, Je-Gil
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.37 no.1
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    • pp.50-57
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    • 2000
  • By supporting wireless communication technology, there is gradually expansion of the commercial application for Wireless Local Loop(WLL) technology, which is to replace existing telephone line with wireless one. The WLL system application helps a operator to have merits of the installation and maintenance of line and also a subscriber to make a high speed value-added service. As mentioned above reasons for both sides, many manufactories and operators are concerned with development and application respectively. This paper presents hardware implementation of Radio Port Controller(RPC) and also describes the system configuration, functions, and Inter Processor Communication(IPC) structure of RPC. We performed inter-module communication test via IPC backplane bus. And inter-module integration test also completed through data communication and signal waveform measurement repeatedly.

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