• Title/Summary/Keyword: Hardware Fault

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A study on Hardware Redundancy Architecture of Fault-Tolerant System (결함허용 시스템의 하드웨어 여분구조에 대한 연구)

  • shin Ducko;Lee Jong-woo;Lee Jae-ho;Lee Key-seo
    • Proceedings of the KSR Conference
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    • 2003.05a
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    • pp.450-455
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    • 2003
  • This paper is to discuss the hardware redundancy architecture of fault-tolerance system with using redundancy. Each architecture will be studied to implement fault-tolerance in classifying hardware redundancy architecture as passive, active and hybrid hardware redundancy. Therefore Fault-Masking and Fault-Detecting Techniques in each redundancy architecture is studied.

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Rotor Fault Detection System for Inverter Driven Induction Motors using Currents Signals and an Encoder

  • Kim, Nam-Hun
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.271-277
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    • 2007
  • In this paper, an induction motor rotor fault diagnosis system using current signals, which are measured using the axis-transformation method is presented. Inverter-fed motor drives, unlike line-driven motor drives, have stator currents which are rich in harmonics and therefore fault diagnosis using stator current is not trivial. The current signals for rotor fault diagnosis need precise and high resolution information, which means the diagnosis system demands additional hardware such as a low pass filter, high resolution ADC, an encoder and additional hardware. Therefore, the proposed axis-transformation method is expected to contribute to a low cost fault diagnosis system in inverter-fed motor drives without the need for any additional hardware. In order to confirm the validity of the developed algorithms, various experiments for rotor faults are tested and the line current spectrum of each faulty situation, using the Park transformation, is compared with the results obtained from the FFT(Fast Fourier Transform).

A Biologically Inspired New Hardware Fault Detection: immunotronic and Genetic Algorithm-Based Approach

  • Lee, Sanghyung;Kim, Euntai;Park, Mignon
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.4 no.1
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    • pp.7-11
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    • 2004
  • This paper proposes a new immunotronic approach for the fault detection in hardware. The suggested method is, inspired by biology and its implementation is based on genetic algorithm. Tolerance conditions in the immunotronic system for fault detection correspond to the antibodies in the biological immune system. A novel algorithm of generating tolerance conditions is suggested based on the principle of the antibody diversity and GA optimization is employed to select mature tolerance conditions in immunotronic fault detection system. The suggested method is applied to the fault detection for MCNC benchmark FSMs (finite state machines) and its effectiveness is demonstrated by the computer simulation.

A countermeasure using secret-key blinding for hardware fault cryptanalysis on elliptic curve scalar multiplication (타원곡선 스칼라 곱셈에 대한 비밀키 blinding을 적용한 hardware fault cryptanalysis 대응방법)

  • 여일연;이경근;김환구;문상재
    • Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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    • 2001.11a
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    • pp.132-138
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    • 2001
  • 본 논문에서는 타원곡선 스칼라 곱셈에 대하여 새로운 형태의 hardware fault cryptanalysis를 적용해 보고, 이에 대한 대응방법으로서 비밀키 blinding방법을 제안하고 있다. 또한 비밀키 blinding 방법을 사용함으로써 늘어나는 연산량을 기존의 대응 방법과 비교하고, 이러한 비밀키 blinding방법이 사용될 수 있는 범위에 대해 다루고 있다.

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Fault Detection and Diagnosis of CAN-Based Distributed Systems for Longitudinal Control of All-Terrain Vehicle(ATV) (무인 ATV의 종 방향 제어를 위한 CAN 기반 분산형 시스템의 고장감지 및 진단)

  • Kim, Soon-Tae;Song, Bong-Sob;Hong, Suk-Kyo
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.10
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    • pp.983-990
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    • 2008
  • This paper presents the fault detection and diagnosis(FDD) algorithm to enhance reliability of a longitudinal controller for an autonomous All-Terrain Vehicle(ATV). The FDD is designed to monitor and identify faults which may occur in distributed hardware used for longitudinal control, e.g., DSPs, CAN, sensors, and actuators. The proposed FDD is an integrated approach of decentralized and centralized FDD. While the former is processed in a DSP and suitable to detect faults in a single hardware, it is sensitive to noise and disturbance. On the other hand, the latter is performed via communication and it detects and diagnoses faults through analyzing concurrent performances of multiple hardware modules, but it is limited to isolate faults specifically in terms of components in the single hardware. To compensate for disadvantages of each FDD approach, two layered structure including both decentralized and centralized FDD is proposed and it allows us to make more robust fault detection and more specific fault isolation. The effectiveness of the proposed method will be validated experimentally.

Design of Computer Hardware Fault Detector using ROM BIOS (ROM BIOS를 이용한 컴퓨터 하드웨어 장애인식 모듈 설계)

  • Nahm, Eui-Seok
    • Journal of the Korea Convergence Society
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    • v.4 no.3
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    • pp.21-26
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    • 2013
  • Currently almost people use a personal computer for various purpose. But some people are not familiar to computer system. If they see only black screen on the monitor when they turn on the computer power, they can not recognize whether it is hardware or software faults. So, in this paper is aimed to develop the module of computer hardware fault detecter using ROM BIOS before OS booting. This module use PCI interface with mother board of computer. Before os booting, it can get the ROM BIOS memory by interrupt and show what hardware is fault according to the predefined memory content of BIOS.

Hardware Implementation of Optical Fault Injection Attack-resistant Montgomery exponentiation-based RSA (광학 오류 주입 공격에 강인한 몽고메리 지수승 기반 RSA 하드웨어 구현)

  • Lee, Dong-Geon;Choi, Yong-Je;Choi, Doo-Ho;Kim, Minho;Kim, Howon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.76-89
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    • 2013
  • In this paper, we propose a novel optical fault detection scheme for RSA hardware based on Montgomery exponentiation, which can effectively detect optical fault injection during the exponent calculation. To protect the RSA hardware from the optical fault injection attack, we implemented integrity check logic for memory and optical fault detection logic for Montgomery-based multiplier. The proposed scheme is considered to be safe from various type of attack and it can be implemented with no additional operation time and small area overhead which is less than 3%.

Low Cost Rotor Fault Detection System for Inverter Driven Induction Motor

  • Kim, Nam-Hun;Choi, Chang-Ho
    • Journal of Electrical Engineering and Technology
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    • v.2 no.4
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    • pp.500-504
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    • 2007
  • In this paper, the induction motor rotor fault diagnosis system using current signals, which are measured using axis-transformation method, and speed, which is estimated using current information, are presented. In inverter-fed motor drives unlike line-driven motor drives the stator currents have numerous harmonics components and therefore fault diagnosis using stator currents is very difficult. The current and speed signal for rotor fault diagnosis needs to be precise. Also, high resolution information, which means the diagnosis system, demands additional hardware such as low pass filter, high resolution ADC, encoder and etc. Therefore, the proposed axis-transformation and speed estimation method are expected to contribute to low cost fault diagnosis systems in inverter-fed motor drives without the need for an encoder and any additional hardware. In order to confirm validity of the developed algorithms, various experiments for rotor faults are tested and the line current spectrum of each faulty situation using Park transformation and speed estimation method are compared with the results obtained from fast Fourier transforms.

Design and Implementation of a Architecture For Fault-Tolerant and Real-Time System (결함허용 실시간 시스템 구조에 대한 설계 및 구현)

  • 유종상;김범식;신인철
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1997.11a
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    • pp.417-433
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    • 1997
  • A real-time operating system has focused primary on techniques to minimize processing time, with a secondary emphasis on system reliability issues. Conversely, fault-tolerant system has concentrated on using recourse and information redundancy to maximize the availability and reliability of the system, with a lesser emphasis on performance. We have developed a fault-tolerant and real-time operations system which support a powerful concurrent runtime environment under the above requirements. In this paper, we present an overview of real-time systems, design and implementation of a duplex architecture using advanced concepts and technologies such as fast " fault detection", "fault isolation" and "fault recovery" Because the duplex architecture has two dentical hardware elements and has several recovery steps and hierarchy to facilitate a fast recovery which must be proceeded by a prompt fault detection and isolation. Thus it makes possible to minimize the overhead of the systems including hardware and software and guarantee the service continuity of he systems.

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Comparative Study of the System Operational Method for Fault-Tolernace (Fault-Tolerance를 위한 시스템의 동작방식에 대한 비교 연구)

  • 양성현;이기서
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.11
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    • pp.1279-1289
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    • 1992
  • Fault-tolerant system in improved the reliability and safety by using hardware and software redundancy. Fault mask and detection, identification techniques are conditionally used with system's application areas. Here DMR system is operated with standby and fail-safe module method that has minimal hardware and software redundancy, then its reliablity and safety comparison is presented respectively. Also this paper proposed an effective methods of dealing with transient faults as compared system's MTTFs to transient faults tolerance capabilities of self-diagnosis program.

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