• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.55-60
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• 2020

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

• Journal of Magnetics
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• v.6 no.3
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• pp.90-93
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• 2001

Co/$Al_O_3$/NiFe and CO/$Al_O_3$/Co tunnel junctions were fabricated by a radio frequency magnetron sputtering at room temperature with hard mask on glass and $4^{\circ}$ tilt cut Si (111) substrates. The barrier layer was formed through two steps. After the Al layer was deposited, it was oxidized in the chamber of a reactive ion etching system (RIE) with $O_2$plasma at various conditions. The dependence of the TMR value and junction resistance on the thickness of Al layer (before oxidation) and oxidation parameters were investigated. Magnetoresistance value of 7% at room temperature was obtained by optimizing the Al layer thickness and oxidation conditions. Circular shape junctions on $4^{\circ}$tilt cut Si (111) substrate showed 4% magnetoresistance. Photovoltaic energy conversion effect was observed with the cross-strip geometry junctions on Si substrate.