• Title/Summary/Keyword: HEVC encoder

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Scheme for Reducing HEVC Intra Coding Complexity Considering Video Resolution and Quantization Parameter (비디오 해상도 및 양자화 파라미터를 고려한 HEVC의 화면내 부호화 복잡도 감소 기법)

  • Lee, Hong-Rae;Seo, Kwang-Deok
    • Journal of Broadcast Engineering
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    • v.19 no.6
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    • pp.836-846
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    • 2014
  • To expedite UHD (Ultra High Definition) video service, the HEVC (High-Efficiency Video Coding) technology has recently been standardized and it achieves two times higher compression efficiency than the conventional H.264/AVC. To obtain the improved efficiency, however, it employs many complex methods which need complicated calculation, thereby resulting in a significantly increased computational complexity when compared to that of H.264/AVC. For example, to improve the coding efficiency of intra frame coding, up to 35 intra prediction modes are defined in HEVC, but this results in an increased encoding time than the H.264/AVC. In this paper, we propose a fast intra prediction mode decision scheme which reduces computational complexity by changing the number of intra prediction mode in accordance with the percentage of PU sizes for a given video resolution, and by classifying the 35 intra prediction modes into 4 categories considering video resolution and quantization parameter. The experimental results show that the total encoding time is reduced by about 7% on average at the cost of only 2% increase in BD-rate.

Study on Fast HEVC Encoding with Hierarchical Motion Vector Clustering (움직임 벡터의 계층적 군집화를 통한 HEVC 고속 부호화 연구)

  • Lim, Jeongyun;Ahn, Yong-Jo;Sim, Donggyu
    • Journal of Broadcast Engineering
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    • v.21 no.4
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    • pp.578-591
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    • 2016
  • In this paper, the fast encoding algorithm in High Efficiency Video Coding (HEVC) encoder was studied. For the encoding efficiency, the current HEVC reference software is divided the input image into Coding Tree Unit (CTU). then, it should be re-divided into CU up to maximum depth in form of quad-tree for RDO (Rate-Distortion Optimization) in encoding precess. But, it is one of the reason why complexity is high in the encoding precess. In this paper, to reduce the high complexity in the encoding process, it proposed the method by determining the maximum depth of the CU using a hierarchical clustering at the pre-processing. The hierarchical clustering results represented an average combination of motion vectors (MV) on neighboring blocks. Experimental results showed that the proposed method could achieve an average of 16% time saving with minimal BD-rate loss at 1080p video resolution. When combined the previous fast algorithm, the proposed method could achieve an average 45.13% time saving with 1.84% BD-rate loss.

Conditional Probability Based Early Termination of Recursive Coding Unit Structures in HEVC (HEVC의 재귀적 CU 구조에 대한 조건부 확률 기반 고속 탐색 알고리즘)

  • Han, Woo-Jin
    • Journal of Broadcast Engineering
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    • v.17 no.2
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    • pp.354-362
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    • 2012
  • Recently, High Efficiency Video Coding (HEVC) is under development jointly by MPEG and ITU-T for the next international video coding standard. Compared to the previous standards, HEVC supports variety of splitting units, such as coding unit (CU), prediction unit (PU), and transform unit (TU). Among them, it has been known that the recursive quadtree structure of CU can improve the coding efficiency while the encoding complexity is increased significantly. In this paper, a simple conditional probability to predict the early termination condition of recursive unit structure is introduced. The proposed conditional probability is estimated based on Bayes' formula from local statistics of rate-distortion costs in encoder. Experimental results show that the proposed method can reduce the total encoding time by about 32% according to the test configuration while the coding efficiency loss is 0.4%-0.5%. In addition, the encoding time can be reduced by 50% with 0.9% coding efficiency loss when the proposed method was used jointly with HM4.0 early CU termination algorithm.

Complexity Reduction of HEVC SAO Intra Modes By Adjustment of Offset Values (HEVC SAO 인트라 모드 오프셋 값 조정을 통한 복잡도 감소)

  • Mun, Ji-Hun;Choi, Jung-Ah;Ho, Yo-Sung
    • Journal of Broadcast Engineering
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    • v.19 no.3
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    • pp.355-361
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    • 2014
  • In this paper, we propose a complexity reduction method of sample adaptive offset (SAO), which is an in-loop filter in high-efficiency video coding (HEVC). In the conventional SAO, an offset value is calculated for each coding tree block (CTB) to minimize the error between the original and reconstructed images. In order to determine the optimal offset value, all offset candidates are examined and the offset value that leads to the smallest rate-distortion cost is chosen. Thus, SAO occupies a significant amount of the computational complexity in the HEVC encoder. In the proposed method, we determine the least-used band (LUB) by considering the statistical characteristics of offset values and without processing the offset value included in the LUB. Also, in the offset value decision stage, we check only a certain number of candidates rather than all of them. Experimental results show that the proposed method reduces the encoding time by approximately 8.15% without yielding a significant loss in terms of coding efficiency.

Fast CU Encoding Schemes Based on Merge Mode and Motion Estimation for HEVC Inter Prediction

  • Wu, Jinfu;Guo, Baolong;Hou, Jie;Yan, Yunyi;Jiang, Jie
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.3
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    • pp.1195-1211
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    • 2016
  • The emerging video coding standard High Efficiency Video Coding (HEVC) has shown almost 40% bit-rate reduction over the state-of-the-art Advanced Video Coding (AVC) standard but at about 40% computational complexity overhead. The main reason for HEVC computational complexity is the inter prediction that accounts for 60%-70% of the whole encoding time. In this paper, we propose several fast coding unit (CU) encoding schemes based on the Merge mode and motion estimation information to reduce the computational complexity caused by the HEVC inter prediction. Firstly, an early Merge mode decision method based on motion estimation (EMD) is proposed for each CU size. Then, a Merge mode based early termination method (MET) is developed to determine the CU size at an early stage. To provide a better balance between computational complexity and coding efficiency, several fast CU encoding schemes are surveyed according to the rate-distortion-complexity characteristics of EMD and MET methods as a function of CU sizes. These fast CU encoding schemes can be seamlessly incorporated in the existing control structures of the HEVC encoder without limiting its potential parallelization and hardware acceleration. Experimental results demonstrate that the proposed schemes achieve 19%-46% computational complexity reduction over the HEVC test model reference software, HM 16.4, at a cost of 0.2%-2.4% bit-rate increases under the random access coding configuration. The respective values under the low-delay B coding configuration are 17%-43% and 0.1%-1.2%.

Human Visual Perception-Based Quantization For Efficiency HEVC Encoder (HEVC 부호화기 고효율 압축을 위한 인지시각 특징기반 양자화 방법)

  • Kim, Young-Woong;Ahn, Yong-Jo;Sim, Donggyu
    • Journal of Broadcast Engineering
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    • v.22 no.1
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    • pp.28-41
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    • 2017
  • In this paper, the fast encoding algorithm in High Efficiency Video Coding (HEVC) encoder was studied. For the encoding efficiency, the current HEVC reference software is divided the input image into Coding Tree Unit (CTU). then, it should be re-divided into CU up to maximum depth in form of quad-tree for RDO (Rate-Distortion Optimization) in encoding precess. But, it is one of the reason why complexity is high in the encoding precess. In this paper, to reduce the high complexity in the encoding process, it proposed the method by determining the maximum depth of the CU using a hierarchical clustering at the pre-processing. The hierarchical clustering results represented an average combination of motion vectors (MV) on neighboring blocks. Experimental results showed that the proposed method could achieve an average of 16% time saving with minimal BD-rate loss at 1080p video resolution. When combined the previous fast algorithm, the proposed method could achieve an average 45.13% time saving with 1.84% BD-rate loss.

Adaptive Reference Structure Decision Method for HEVC Encoder (HEVC 부호화기의 적응적 참조 구조 변경 방법)

  • Mok, Jung-Soo;Kim, JaeRyun;Ahn, Yong-Jo;Sim, Donggyu
    • Journal of Broadcast Engineering
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    • v.22 no.1
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    • pp.1-14
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    • 2017
  • This paper proposes adaptive reference structure decision method to improve the performance of HEVC (High Efficiency Video Coding) encoder. When an event occurs in the input sequence, such as scene change, scene rotation, fade in/out, or light on/off, the proposed algorithm changes the reference structure to improve the inter prediction performance. The proposed algorithm divides GOP (Group Of Pictures) into two sub-groups based on the picture that has such event and decides the reference pictures in the divided sub-groups. Also, this paper proposes fast encoding method which changes the picture type of first encoded picture in the GOP that has such event to CRA (Clean Random Access). With the statistical feature that intra prediction is selected by high probability for the first encoded picture in the GOP carrying such event, the proposed fast encoding method does not operate inter prediction. The experimental result shows that the proposed adaptive reference structure decision method improves the BD-rate 0.3% and reduces encoding time 4.9% on average under the CTC (Common Test Condition) for standardization. In addition, the proposed reference structure decision method with the picture type change reduces the average encoding time 12.2% with 0.11% BD-rate loss.

Down Sampling for Fast Rough Mode Decision for a Hardware-based HEVC Intra-frame encoder (하드웨어 기반 HEVC 인트라 인코더에서 다운 샘플링을 사용한 고속 Rough Mode Decision)

  • Jang, Ji Hun;Rhee, Chae Eun
    • Journal of Broadcast Engineering
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    • v.21 no.3
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    • pp.341-348
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    • 2016
  • HEVC is the next compression standard and is expected to be used widely replacing the conventional H.264/AVC standard. The compression ratio of the HEVC is twice times than H.264/AVC, whereas its computational complexity is increased by up to 40%. Many research efforts have been made to reduce the computational complexity and to speed up encoding. For intra coding, the rough mode decision (RMD) is commonly applied. The rate-distortion optimization (RDO) process to decide the best mode is too complex so that RMD chooses the candidate modes with a simple process and sends the candidates to RDO process. However, for large-size blocks, the RMD also requires considerable computations. In this paper, a down-sampling scheme is proposed for the RMD process. The reference pixel loading, predicted pixel generation are performed using the down-sampled pixel data. When the proposed scheme is applied to the RMD, the computational complexity is reduced by 70% with a marginal bitrate increase of 0.04%. In terms of area of hardware-based RMD, the gate count and the buffer size is reduced 33% and 66%, respectively.

Motion Estimation and Coding Technique using Adaptive Motion Vector Resolution in HEVC (HEVC에서의 적응적 움직임 벡터 해상도를 이용한 움직임 추정 및 부호화 기법)

  • Lim, Sung-Won;Lee, Ju Ock;Moon, Joo-Hee
    • Journal of Broadcast Engineering
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    • v.17 no.6
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    • pp.1029-1039
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    • 2012
  • In this papar, we propose a new motion estimation and coding technique using adaptive motion vector resolution. Currently, HEVC encodes a video using 1/4 motion vector resolution. If there are high texture regions in a picture, HEVC can't get a performance enough. So, we insert additional 1-bit flag meaning whether motion vector resolution is 1/4 or 1/8 in PU syntax. Therefore, decoder can recognize the transmitted motion vector resolution. Experimental results show that maximum coding efficiency gain of the proposed method is up to 5.3% in luminance and 7.9% in chrominance. Average computional time complexity is increased about 33% in encoder and up to 5% in decoder.

An Intra Prediction Hardware Design for High Performance HEVC Encoder (고성능 HEVC 부호기를 위한 화면내 예측 하드웨어 설계)

  • Park, Seung-yong;Guard, Kanda;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.875-878
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    • 2015
  • In this paper, we propose an intra prediction hardware architecture with less processing time, computations and reduced hardware area for a high performance HEVC encoder. The proposed intra prediction hardware architecture uses common operation units to reduce computational complexity and uses $4{\times}4$ block unit to reduce hardware area. In order to reduce operation time, common operation unit uses one operation unit to generate predicted pixels and filtered pixels in all prediction modes. Intra prediction hardware architecture introduces the $4{\times}4$ PU design processing to reduce the hardware area and uses intemal registers to support $32{\times}32$ PU processmg. The proposed hardware architecture uses ten common operation units which can reduce execution cycles of intra prediction. The proposed Intra prediction hardware architecture is designed using Verilog HDL(Hardware Description Language), and has a total of 41.5k gates in TSMC $0.13{\mu}m$ CMOS standard cell library. At 150MHz, it can support 4K UHD video encoding at 30fps in real time, and operates at a maximum of 200MHz.

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