• Title/Summary/Keyword: HD Video

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VDI Performance Optimization with Hybrid Parallel Processing in Thick Client System under Heterogeneous Multi-Core Environment (Heterogeneous 멀티 코어 환경의 Thick Client에서 VDI 성능 최적화를 위한 혼합 병렬 처리 기법 연구)

  • Kim, Myeong-Seob;Huh, Eui-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.3
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    • pp.163-171
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    • 2013
  • Recently, the requirement of processing High Definition (HD) video or 3D application on low, mobile devices has been expanded and content data has been increased as well. It is becoming a major issue in Cloud computing where a Virtual Desktop Infrastructure (VDI) Service needs efficient data processing ability to provide Quality of Experience (QoE) in Cloud computing. In this paper, we propose three kind of Thick-Thin VDI Service which can share and delegate VDI service based on Thick Client using CPU and GPU. Furthermore, we propose and discuss the VDI Service Optimization Method in mixed CPU and GPU Heterogeneous Environment using CPU Parallel Processing OpenMP and GPU Parallel Processing CUDA.

A Study on the HEVC Video Encoder PMR Block Design (HEVC 비디오 인코더 PMR 블록 설계에 대한 연구)

  • Lee, Sukho;Lee, Jehyun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.12
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    • pp.141-146
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    • 2016
  • HEVC/H.265 is the latest joint video coding standard proposed by ITU-T SG 16 WP and ISO/IEC JTC 1/SC29/WG 11. In H.265, pictures are divided into a sequence of coding tree units(CTUs), and the CTU further is partitioned into multiple CUs to adapt to various local characteristics. Its coding efficiency is approximately two times high compared to previous standard H.264/AVC. However according to the size of extended CU(coding unit) and transform block, the hardware size of PMR(prediction/mode decision/reconstruction) block within video encoder is about 4 times larger than previous standard. In this study, we propose a new less complex hardware architecture of PMR block which has the most high complexity within encoder without any noticeable PSNR loss. Using this simplified block, we can shrink the overall size the H.265 encoder. For FHD image, it operates at clocking frequency of 300 MHz and frame rate of 60 fps. And also for the test image, the Bjøntegaard Delta (BD) bit rate increase about average 30 % in PMR prediction block, and the total estimated gate count of PMR block is around 1.8 M.

Fast Non-integer Motion Estimation for HEVC Encoder (HEVC 부호화기를 위한 고속 비정수 움직임 추정)

  • Han, Woo-Jin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.12
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    • pp.150-159
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    • 2014
  • The latest video coding standard, HEVC can improve the coding efficiency significantly compared with the H.264/AVC. However the HEVC encoder requires much larger computational complexities. The longer 8-tap interpolation filter of the HEVC which is used in a non-integer motion estimation is one of the reasons and this paper aims to reduce the computational complexities. First of all, three shorter-tap interpolation filters for a motion estimation process are tested rather than the use of a standard interpolation filter. In addition, the fast searching strategies to reduce the number of comparisons for choosing the best non-integer motion vector are proposed. Finally, the interpolation process is selectively applied according to the searching strategy. By combining all of the techniques, the experimental results show that the encoding times can be reduced by 13.6%, 18.5% and 21.1% with the coding efficiency penalties of 0.7%, 1.5% and 2.5%, respectively. For the full-HD video sequences, the coding efficiency penalties are reduced to 0.4%, 1.1% and 1.6% at the same level of the encoding time savings, which shows the effectiveness of the proposed schemes for the high resolution video sequences.

Hardware Design of In-loop Filter for High Performance HEVC Encoder (고성능 HEVC 부호기를 위한 루프 내 필터 하드웨어 설계)

  • Park, Seungyong;Im, Junseong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.335-342
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    • 2016
  • This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

An effective transform hardware design for real-time HEVC encoder (HEVC 부호기의 실시간처리를 위한 효율적인 변환기 하드웨어 설계)

  • Jo, Heung-seon;Kumi, Fred Adu;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.416-419
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    • 2015
  • In this paper, we propose an effective design of transform hardware for real-time HEVC(High Efficiency Video Coding) encoder. HEVC encoder determines the transform mode($4{\times}4$, $8{\times}8$, $16{\times}16$, $32{\times}32$) by comparing RDCost. RDCost require a significant amount of computation and time because it is determined by bit-rate and distortion which is computated via transform, quantization, dequantization, and inverse transform. This paper therefore proposes a new method for transform mode determination using sum of transform coefficient. Also, proposed hardware architecture is implemented with multiplexer, recursive adder/subtracter, and shifter only to derive reduction of the computation. Proposed method for transform mode determination results in an increase of 0.096 in BD-PSNR, 0.057 in BD-Bitrate, and decrease of 9.3% in encoding time by comparing HM 10.0. The hardware which is proposed is implemented by 256K logic gates in TSMC 130nm process. Its maximum operation frequency is 200MHz. At 140MHz, the proposed hardware can support 4K Ultra HD video encoding at 60fps in real time.

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Amplitude Panning Algorithm for Virtual Sound Source Rendering in the Multichannel Loudspeaker System (다채널 스피커 환경에서 가상 음원을 생성하기 위한 레벨 패닝 알고리즘)

  • Jeon, Se-Woon;Park, Young-Cheol;Lee, Seok-Pil;Youn, Dae-Hee
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.4
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    • pp.197-206
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    • 2011
  • In this paper, we proposes the virtual sound source panning algorithm in the multichannel system. Recently, High-definition (HD) and Ultrahigh-definition (UHD) video formats are accepted for the multimedia applications and they provide the high-quality resolution pixels and the wider view angle. The audio format also needs to generate the wider sound field and more immersive sound effects. However, the conventional stereo system cannot satisfy the desired sound quality in the latest multimedia system. Therefore, the various multichannel systems that can make more improved sound field generation are proposed. In the mutichannel system, the conventional panning algorithms have acoustic problems about directivity and timbre of the virtual sound source. To solve these problems in the arbitrary positioned multichannel loudspeaker system, we proposed the virtual sound source panning algorithm using multiple vectors base nonnegative amplitude panning gains. The proposed algorithm can be easily controlled by the gain control function to generate an accurate localization of the virtual sound source and also it is available for the both symmetric and asymmetric loudspeakers format. Its performance of sound localization is evaluated by subjective tests comparing with conventional amplitude panning algorithms, e.g. VBAP and MDAP, in the symmetric and asymmetric formats.

Fast Algorithm for Disparity Estimation in ATSC-M/H based Hybrid 3DTV (ATSC-M/H 기반의 융합형 3DTV를 위한 양안시차 고속 추정 알고리즘)

  • Lee, Dong-Hee;Kim, Sung-Hoon;Lee, Jooyoung;Kang, Dongwook;Jung, Kyeong-Hoon
    • Journal of Broadcast Engineering
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    • v.19 no.4
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    • pp.521-532
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    • 2014
  • ATSC-M/H based hybrid 3DTV, which is one of the service compatible 3DTV system, has considerable quality gap between the left and right views. And CRA(Conditional Replenishment Algorithm) has been proposed to deal with the issue of resolution mismatch and improve the visual quality. In CRA, the disparity vectors of stereoscopic images are estimated. The disparity compensated left view and simply enlarged right view are compared and conditionally selected for generating the enhanced right view. In order to implement CRA, a fast algorithm is strongly required because the disparity vectors need to be obtained at every layer and the complexity of CRA is quite high. In this paper, we adopted SDSP(Small Diamond Search Pattern) instead of full search and predicted the initial position of search pattern by examining the spatio-temporal correlation of disparity vectors and also suggested the SKIP mode to limit the number of processing units. The computer simulation showed that the proposed fast algorithm could greatly reduce the processing time while minimizing the quality degradation of reconstructed right view.

Optical System Design of Compact Head-Up Display(HUD) using Micro Display (마이크로 디스플레이를 이용한 소형 헤드업 디스플레이 광학계 설계)

  • Han, Dong-Jin;Kim, Hyun-Hee
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.9
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    • pp.6227-6235
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    • 2015
  • The HUD has recently been downsized due to the development of micro display and LED technology as a see through information display device, gradually expands the application areas. In this paper, using a DLP micro display device designed a compact head-up display(HUD) optical system for biocular observation of the image exhibition area 5 inches. It was analyzed for each design element of the optical system in order to design a compacted HUD. DLP, projection optical system and concave image combiner were discussed the design approach and the characteristics. Through a connection structure analysis of each optical system, detailed design specifications were set up and designed the optical system in detail. Put a folded configuration in the form of a white diffuse reflector between the projection lens and concave image combiner was designed to be independent, respectively. Distance of the projected image is adjustable up to approximately 2m ~ infinity and observation distance is 1m. Resolution could be recognized by 1 ~ 2pixels in HD($1,280{\times}720pixels$) class, various characters and symbols could be read. In addition, color navigation map, daytime video camera and thermal imaging cameras can be displayed.

Observation on the Seabed around Simheungteak Seamount near Dokdo and using Mini-ROV (소형 ROV를 활용한 독도 및 심흥택해산 해저면 탐사)

  • MIN, WON-GI;RHO, HYUN SOO;KIM, CHANG HWAN;PARK, CHAN HONG;KIM, DONGSUNG
    • The Sea:JOURNAL OF THE KOREAN SOCIETY OF OCEANOGRAPHY
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    • v.24 no.1
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    • pp.18-29
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    • 2019
  • ROV surveys were conducted using 500 meter mini class ROV with HD video camera, 2 LED lights, a simple manipulator and 8 thrusters near the Dokdo and Simheungtaek seamount. Total six dives have been conducted using the ROV "V8 SII" from Sweden and ROV's support ship, "KOSAL V" at 4 stations between 45 and 370 meters with diving time ranged from 30 to 120 minutes. Dense communities of sea anemone (Actinostolidae sp.) and ophiuroids (Ophiuridae sp.) on the surface of rocky bottom and snow crab on the soft bottom with muddy-sand were observed at northwestern part of Simheungtaek seamount. We obtained the following results 1) habitats information for snow crab, one of the major fisheries resources, and deep-sea fauna, 2) observation on the specific topography and sediment conditions, 3) observation of the seabed surface covered with the discarded fishing gears. This study represents the first report of in situ visual observation of deep-sea organisms and their habitats near the Dokdo slopes and flat top of the Simheungtaek seamount in the East Sea. These results indicated that immediate oceanographic survey using the mini class ROV is available in the East Sea.

An Enhanced Separable Adaptive Interpolation Filter for High-Definition Video Compression (고해상도 비디오 압축을 위한 향상된 분리 적응형 보간 필터)

  • Yoon, Yeo-Jin;Jung, Seung-Won;Choi, Hae-Chul;Choi, Jin-Soo;Ko, Sung-Jea
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.11a
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    • pp.53-56
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    • 2009
  • 최근 HD 방송의 실현과 함께 HDTV가 빠르게 상용화되면서 고화질 비디오를 더 효율적으로 압축하기 위한 기술 개발이 활발하게 진행되고 있다. 최신 표준 비디오 압축 방식인 H.264/AVC에서는 고정 6탭 필터를 사용하여 참조 영상을 보간하고 움직임 예측을 수행하는데, 이의 압축 효율을 향상시키기 위하여 고정 필터를 개선한 비분리 적응형 보간 필터가 개발되었다. 하지만 비분리 적응형 보간 필터는 압축률뿐만 아니라 계산량도 증가하는 단점이 있기 때문에 2차원 필터를 1차원 필터의 연결로 모델링 한 분리 적응형 보간 필터가 개발되었고, 그 결과 압축률은 비슷하게 유지하면서 계산량을 훨씬 줄일 수 있게 되었다. 분리 적응형 보간 필터는 1차원 필터 모델링을 할 때, 수평방향의 필터링 수행 후 수직방향 필터링을 하기 때문에 이를 통해 만들어진 보간 영상은 원 영상의 수평방향에 대한 특성을 더 많이 반영하게 된다. 따라서 수직방향으로 더 높은 주파수 특성을 갖는 영상의 경우에는 효율이 떨어지게 된다. 이를 고려하여 본 논문에서는 영상의 수직방향 주파수 특성을 더 많이 반영할 수 있는 보간 필터를 추가함으로써 영상의 주파수 특성에 따라 보간 필터를 적응적으로 선택하는 향상된 분리 적응형 보간 필터를 제안한다. 제안한 알고리즘을 이용할 경우 기존의 분리 적응형 보간 필터에 비해 움직임 예측 및 보상이 더 정확하게 이뤄질 수 있으며, 부호화 효율이 향상됨을 확인할 수 있다.

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