• Title/Summary/Keyword: H.264 Codec

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Dual Codec Based Joint Bit Rate Control Scheme for Terrestrial Stereoscopic 3DTV Broadcast (지상파 스테레오스코픽 3DTV 방송을 위한 이종 부호화기 기반 합동 비트율 제어 연구)

  • Chang, Yong-Jun;Kim, Mun-Churl
    • Journal of Broadcast Engineering
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    • v.16 no.2
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    • pp.216-225
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    • 2011
  • Following the proliferation of three-dimensional video contents and displays, many terrestrial broadcasting companies have been preparing for stereoscopic 3DTV service. In terrestrial stereoscopic broadcast, it is a difficult task to code and transmit two video sequences while sustaining as high quality as 2DTV broadcast due to the limited bandwidth defined by the existing digital TV standards such as ATSC. Thus, a terrestrial 3DTV broadcasting with a heterogeneous video codec system, where the left image and right images are based on MPEG-2 and H.264/AVC, respectively, is considered in order to achieve both high quality broadcasting service and compatibility for the existing 2DTV viewers. Without significant change in the current terrestrial broadcasting systems, we propose a joint rate control scheme for stereoscopic 3DTV service based on the heterogeneous dual codec systems. The proposed joint rate control scheme applies to the MPEG-2 encoder a quadratic rate-quantization model which is adopted in the H.264/AVC. Then the controller is designed for the sum of the left and right bitstreams to meet the bandwidth requirement of broadcasting standards while the sum of image distortions is minimized by adjusting quantization parameter obtained from the proposed optimization scheme. Besides, we consider a condition on maintaining quality difference between the left and right images around a desired level in the optimization in order to mitigate negative effects on human visual system. Experimental results demonstrate that the proposed bit rate control scheme outperforms the rate control method where each video coding standard uses its own bit rate control algorithm independently in terms of the increase in PSNR by 2.02%, the decrease in the average absolute quality difference by 77.6% and the reduction in the variance of the quality difference by 74.38%.

Parallelization Method of Slice-based video CODEC (슬라이스 기반 비디오 코덱 병렬화 기법)

  • Nam, Jung-Hak;Ji, Bong-Il;Jo, Hyun-Ho;Sim, Dong-Gyu;Cho, Dae-Sung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.6
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    • pp.48-56
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    • 2010
  • Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

Distortion Measurement based Dynamic Packet Scheduling of Video Stream over IEEE 802.11e WLANs

  • Wu, Minghu;Chen, Rui;Zhou, Shangli;Zhu, Xiuchang
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.7 no.11
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    • pp.2793-2803
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    • 2013
  • In H.264, three different data partition types are used, which have unequal importance to the reconstructed video quality. To improve the performance of H.264 video streaming transmission over IEEE 802.11e Wireless Local Area Networks, a prioritization mechanism that categorizes different partition types to different priority classes according to the calculated distortion within one Group of Pictures. In the proposed scheme, video streams have been encoded based on the H.264 codec with its data partition enabled. The dynamic scheduling scheme based on Enhanced Distributed Channel Access has been configured to differentiate the data partitions according to their distortion impact and the queue utilization ratio. Simulation results show that the proposed scheme improves the received video quality by 1dB in PSNR compared with the existing Enhanced Distributed Channel Access static mapping scheme.

Privacy-Preserving H.264 Video Encryption Scheme

  • Choi, Su-Gil;Han, Jong-Wook;Cho, Hyun-Sook
    • ETRI Journal
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    • v.33 no.6
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    • pp.935-944
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    • 2011
  • As a growing number of individuals are exposed to surveillance cameras, the need to prevent captured videos from being used inappropriately has increased. Privacy-related information can be protected through video encryption during transmission or storage, and several algorithms have been proposed for such purposes. However, the simple way of evaluating the security by counting the number of brute-force trials is not proper for measuring the security of video encryption algorithms, considering that attackers can devise specially crafted attacks for specific purposes by exploiting the characteristics of the target video codec. In this paper, we introduce a new attack for recovering contour information from encrypted H.264 video. The attack can thus be used to extract face outlines for the purpose of personal identification. We analyze the security of previous video encryption schemes against the proposed attack and show that the security of these schemes is lower than expected in terms of privacy protection. To enhance security, an advanced block shuffling method is proposed, an analysis of which shows that it is more secure than the previous method and can be an improvement against the proposed attack.

A Novel Method for Bitrate Control within Macroblocks Using Kalman and FIR Filters

  • Seok, Jin-Wuk;Yoon, Ki-Song;Kim, Bum-Ho;Lee, Jeong-Woo
    • ETRI Journal
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    • v.33 no.4
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    • pp.641-644
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    • 2011
  • In this letter, we propose a novel bitrate control, using both Kalman and FIR filters, based on a Hamiltonian analysis with respect to the amount of bits from each macroblock, in an encoding of a general video codec such as H.264/AVC. Since the proposed bitrate control is based on the simple computation of an optimal control method based on the Hamiltonian analysis, it is not necessary to use additional computation, such as a DCT or quantization, to estimate the bits for bitrate control. As a result, the proposed algorithm can be applied to single-pass encoding and can provide sufficient encoding speed with respect to various applications, even those requiring real-time control.

A New Hardware Architecture of High-Speed Motion Estimator for H.264 Video CODEC (H.264 비디오 코덱을 위한 고속 움직임 예측기의 하드웨어 구조)

  • Lim, Jeong-Hun;Seo, Young-Ho;Choi, Hyun-Jun;Kim, Dong-Wook
    • Journal of Broadcast Engineering
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    • v.16 no.2
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    • pp.293-304
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    • 2011
  • In this paper, we proposed a new hardware architecture for motion estimation (ME) which is the most time-consuming unit among H.264 algorithms and designed to the type of intellectual property (IP). The proposed ME hardware consists of buffer, processing unit (PU) array, SAD (sum of absolute difference) selector, and motion vector (MVgenerator). PU array is composed of 16 PUs and each PU consists of 16 processing elements (PUs). The main characteristics of the proposed hardware are that current and reference frames are re-used to reduce the number of access to the external memory and that there is no clock loss during SAD operation. The implemented ME hardware occupies 3% hardware resources of StatixIII EP3SE80F1152C2 which is a FPGA of Altera Inc. and can operate at up to 446.43MHz. Therefore it can process up to 50 frames of 1080p in a second.

Method of Lossless Image Compression Using Hybrid Bitplane Coding (비트평면 혼합 코딩을 이용한 무손실 이미지 압축방법)

  • Moon, Young-Ho;Choi, Jong-Bum;Sim, Woo-Sung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.10C
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    • pp.961-967
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    • 2009
  • In this paper, the lossless compression method is proposed for an 8-bit bitplane of the input image. The lower bitplanes are not well compressed because of irregularity of pixels. To overcome these drawbacks, this paper propose a mixed coding method that using the block-based lossless compression and the bit-based losselss compression, introducing the H. 264 and the JBIG. First, to take advantage of the characteristics of the bitplanes, 8-bitplane against the top 4 bits and lower 4 bits were separated. Next, the JBIG compression method was used in separated top 4-bitplane because of a lot of correlation between bits. And a separated lower 4-bitplane was applied the improved method that using the H. 264 lossless prediction. A pre-processing method applied to the lower 4-bitplane then irregular distribution of pixel values are converted to regular. Using the proposed method to test for various test images were performed. Experimental results from a printer using 8-bit image compared to JBIG average 19%, lower 4bit image compression performance with an average of 11% could be obtained.

Stereoscopic Video Display System Based on H.264/AVC (H.264/AVC 기반의 스테레오 영상 디스플레이 시스템)

  • Kim, Tae-June;Kim, Jee-Hong;Yun, Jung-Hwan;Bae, Byung-Kyu;Kim, Dong-Wook;Yoo, Ji-Sang
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.6C
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    • pp.450-458
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    • 2008
  • In this paper, we propose a real-time stereoscopic display system based on H.264/AVC. We initially acquire stereo-view images from stereo web-cam using OpenCV library. The captured images are converted to YUV 4:2:0 format as a preprocess. The input files are encoded by stereo-encoder, which has a proposed estimation structure, with more than 30 fps. The encoded bitstream are decoded by stereo-decoder reconstructing left and right images. The reconstructed stereo images are postprocessed by stereoscopic image synthesis technique to offer users more realistic images with 3D effect. Experimental results show that the proposed system has better encoding efficiency compared with using a conventional stereo CODEC(coder and decoder) and operates with real-time processing and low complexity suitable for an application with a mobile environment.

Fast Motion Estimation for Variable Motion Block Size in H.264 Standard (H.264 표준의 가변 움직임 블록을 위한 고속 움직임 탐색 기법)

  • 최웅일;전병우
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.6
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    • pp.209-220
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    • 2004
  • The main feature of H.264 standard against conventional video standards is the high coding efficiency and the network friendliness. In spite of these outstanding features, it is not easy to implement H.264 codec as a real-time system due to its high requirement of memory bandwidth and intensive computation. Although the variable block size motion compensation using multiple reference frames is one of the key coding tools to bring about its main performance gain, it demands substantial computational complexity due to SAD (Sum of Absolute Difference) calculation among all possible combinations of coding modes to find the best motion vector. For speedup of motion estimation process, therefore, this paper proposes fast algorithms for both integer-pel and fractional-pel motion search. Since many conventional fast integer-pel motion estimation algorithms are not suitable for H.264 having variable motion block sizes, we propose the motion field adaptive search using the hierarchical block structure based on the diamond search applicable to variable motion block sizes. Besides, we also propose fast fractional-pel motion search using small diamond search centered by predictive motion vector based on statistical characteristic of motion vector.

Hardware Implementation of DCT and CAVLC for H.264/AVC based on Co-design (병행설계를 이용한 H.264/AVC의 DCT 및 CAVLC 하드웨어 구현)

  • Wang, Duck-Sang;Seo, Seok-Yong;Ko, Hyung-Hwa
    • Journal of Advanced Navigation Technology
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    • v.17 no.1
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    • pp.69-79
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    • 2013
  • In this paper, DCT(Discrete Cosine Transform) and CAVLC(Context Adaptive Variable Length Coding) are co-designed as hardware IP with software operation of the other modules in H.264/AVC codec. In order to increase the operation speed, a new method using SHIFT table is proposed. As a result, enhancement of about 16(%) in the operation speed is obtained. Designed Hardware IPs are downloaded into Virtex-4 FX60 FPGA in the ML-410 development board and H.264/AVC encoding is performed with Microblaze CPU implemented in FPGA. Software modules are developed from JM13.2 to make C code. In order to verify the designed Hardware IPs, Modelsim program is used for functional simulation. As a result that all Hardware IPs and software modules are downloaded into the FPGA, improvement of processing speed about multiples of 16 in case of DCT hardware IP and multiples of 10 in case of CAVLC compared with software-only processing. Although this paper deals with co-design of H/W and S/W for H.264, it can be utilized for the other embedded system design.