• Journal of Broadcast Engineering
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• v.15 no.4
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• pp.540-546
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• 2010

Since the stereoscopic 3-dimensional (3D) video that provides users with a realistic multimedia service requires twice as much data as 2-dimensional (2D) video, it is difficult to construct the fast system. In this paper, we propose a fast stereoscopic 3D broadcasting system based on the depth information. Before the transmission, we encode the input 2D+depth video using x264, an open source H.264/AVC fast encoder to reduce the size of the data. At the receiver, we decode the transmitted bitstream in real time using a compute unified device architecture (CUDA) video decoder API on NVIDIA graphics processing unit (GPU). Then, we apply a fast view synthesis method that generates the virtual view using GPU. The proposed system can display the output video in both 2DTV and 3DTV. From the experiment, we verified that the proposed system can service the stereoscopic 3D contents in 24 frames per second at most.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11B
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• pp.1296-1302
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• 2009

We propose an efficient coding method of digital holograms using MCTF and standard compression tools for video. The hologram is generated by a computer-generated hologram (CGH) algorithm with both an object image and its depth information. The proposed coding consists of localization by segmenting a hologram, frequency transform using $64\times64$ segment size, 2-D discrete cosine transform DCT for extracting redundancy, motion compensated temporal filtering (MCTF), segment scanning the segmented hologram to form a video sequence, and video coding, which uses H.264/AVC. The proposed algorithm illustrates that it has better properties for reconstruction, 10% higher compression rate than previous research in case of object.

• The Journal of the Korea Contents Association
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• v.9 no.4
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• pp.12-18
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• 2009

In this paper, we propose a novel method which efficiently codes $4{\times}4$ intra prediction modes in H.264/ AVC video encoding. There are nine optional prediction modes for each $4{\times}4$luma block and 4 modes for each $16{\times}16$luma block. To code each $4{\times}4$ intra prediction mode, lots of bits are required. To efficiently compress the intra mode bits in H.264/AVC, the most probable mode(MPM) is estimated by using the intra modes of the adjacent blocks, since intra modes for neighboring $4{\times}4$luma blocks are correlated. In this paper, a novel method for estimating the MPM is proposed by using the statistical distribution of intra modes of adjacent intra blocks. Experimental results show that the proposed method can achieve a coding gain of about 0.1dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.9
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• pp.71-78
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• 2008

In this paper, we implement the H.264/AVC baseline decoder by hardware-software partitioning under the embedded Linux Kernel 2.4.26 and the FPGA-based target board with ARM926EJ-S core. We design several IPs for the time-demanding blocks, such as motion compensation, deblocking filter, and YUV-to-RGB and they are communicated with the host through the AMBA bus protocol. We also try to minimize the number of memory accesses between IPs and the reference software (JM 11.0) which is ported in the embedded Linux. The proposed IPs and the system have been designed and verified in several stages. The proposed system decodes the QCIF sample video at 2 frame per second when 24MHz of system clock is running and we expect the bitter performance if the proposed system is designed with ASIC.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.9
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• pp.229-237
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• 2014

This paper presents a video bitrate converter for baseline profile in H.264/AVC standards to control a selective coding scheme for several applications such as tactical scenes or multimedia area. Transmission channels have various capacities according to the application area, and the bitstream stored in computer should be converted in order not to exceed the capacities of a transmission channel. So the problem is how to convert compressed bitsreams of a given bit-rate into compressed bitsreams of other bit-rates. Such a specific transcoding problem in this paper is referred to as bit-rate conversion. Several researches have been done on bit-rate conversion for the bitstreams compressed by MPEG or H.264/AVC. But the existing schemes are not suitable for selective coding scheme because it needs to recover interest regions better image quality than background. So we propose a new bit-rate converter which considers the importance between interest regions and background.

• Journal of IKEEE
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• v.17 no.4
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• pp.418-427
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• 2013

In this paper, we propose a parallel deblocking filter algorithm for H.264/AVC video standard. The deblocking filter has different filter processes according to boundary strength (BS) and each filter process requires various conditional calculations. The order of filtering makes it difficult to parallelize deblocking filter calculations. The proposed deblocking filter algorithm is performed on PRAGRAM which is a 1-D coarse grained reconfigurable architecture (CGRA). Each filter calculation is accelerated using uni-directional pipelined architecture of PRAGRAM. The filter selection and the conditional calculations are efficiently performed using dynamic reconfiguration and conditional reconfiguration. The parallel deblocking filter algorithm uses 225 cycles to process a macroblock and it can process a full HD image at 150 MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.66-72
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• 2009

This paper proposes an efficient binary arithmetic encoder for CABAC which is used one of the entropy coding methods for H.264/AVC. The present binary arithmetic encoding algorithm requires huge complexity of operation and data dependency of each step, which is difficult to be operated in fast. Therefore, renormalization exploits 2-stage pipeline architecture for efficient process of operation, which reduces huge complexity of operation and data dependency. Context model updater is implemented by using a simple expression instead of transIdxMPS table and merging transIdxLPS and rangeTabLPS tables, which decreases hardware size. Arithmetic calculator consists of regular mode, bypass mode and termination mode for appearance probability of binary value. It can operate in maximum speed. The proposed binary arithmetic encoder has 7282 gate counts in 0.18um standard cell library. And input symbol per cycle is about 1.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.34-40
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• 2010

This paper proposes an efficient CABAC encoder to reduce syntax element storage in H.264/AVC entropy coding. In the proposed architecture, all blocks are designed in dedicated hardware, so it performs fast processing without programmable processors. Context modeler of CABAC encoder requires the neighbor block data. However it requires impractically huge memory size if the neighbor block data is directly stored without proper processing. Therefore, this paper proposes an effective method of storing the neighbor block data to decrease memory size. The proposed CABAC encoder has 35,463 gates in 0.18um standard cell library. It operates at maximum speed of 180MHz and its throughput is about 1 cycle per input symbol.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11C
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• pp.925-931
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• 2008

In video coding standard H.264/AVC, variable block size mode algorithm improves compression efficiency but has need of a large amount of computation for various block modes and mode decision. Meanwhile, decided inter block modes depend on the complexity of a block image, and then the more complex a macroblock is, the smaller its block size is. This paper proposes fast inter block mode decision algorithm. It limits valid block modes to the block modes with a great chance for decision using the image complexity and carries out motion estimation rate-distortion optimization with only the valid block modes. In addition to that, it applies fast motion estimation PDE to the valid block modes with only the $16{\times}16$ block mode. The reference software JM 9.5 was executed to estimate the proposed algorithm's performance. The simulation results showed that the proposed algorithm could save about 24.12% of the averaged motion estimation time while keeping the image quality and the bit rate to be -0.02dB and -0.12% on the average, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6C
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• pp.450-458
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• 2008

In this paper, we propose a real-time stereoscopic display system based on H.264/AVC. We initially acquire stereo-view images from stereo web-cam using OpenCV library. The captured images are converted to YUV 4:2:0 format as a preprocess. The input files are encoded by stereo-encoder, which has a proposed estimation structure, with more than 30 fps. The encoded bitstream are decoded by stereo-decoder reconstructing left and right images. The reconstructed stereo images are postprocessed by stereoscopic image synthesis technique to offer users more realistic images with 3D effect. Experimental results show that the proposed system has better encoding efficiency compared with using a conventional stereo CODEC(coder and decoder) and operates with real-time processing and low complexity suitable for an application with a mobile environment.