• Proceeding of EDISON Challenge
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• 2015.03a
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• pp.338-342
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• 2015

Ripples and charge impurity effect of graphene are considered as the origin of charge puddles in graphene sheet on SiO2. However, this topic is very controversial among researchers in graphene community. In this study, by using density functional theory, we calculate the band structure of the rippled graphene model and charged impurity model that is located close to the (0001) ${\alpha}$-quartz surface. We expect that this study will provide great insight on this matter.

• Korean Journal of Materials Research
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• v.26 no.11
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• pp.635-643
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• 2016

Graphene has shown exceptional properties for high performance devices due to its high carrier mobility. Of particular interest is the potential use of graphene nanoribbons as field-effect transistors. Herein, we introduce a facile approach to the fabrication of graphene nanoribbon (GNR) arrays with ~200 nm width using nanoimprint lithography (NIL), which is a simple and robust method for patterning with high fidelity over a large area. To realize a 2D material-based device, we integrated the graphene nanoribbon arrays in field effect transistors (GNR-FETs) using conventional lithography and metallization on highly-doped $Si/SiO_2$ substrate. Consequently, we observed an enhancement of the performance of the GNR-transistors compared to that of the micro-ribbon graphene transistors. Besides this, using a transfer printing process on a flexible polymeric substrate, we demonstrated graphene-silicon junction structures that use CVD grown graphene as flexible electrodes for Si based transistors.

• Composites Research
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• v.29 no.4
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• pp.194-202
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• 2016

A graphene film, two-dimensional carbon sheet, is a promising material for future electronic devices and so on. In graphene applications, the effect of substrate on the atomic/electronic structures of graphene is significant, so we studied an interaction between graphene film and substrate. To study the effect, we investigated the graphene films grown on Ni substrate with two crystal face of (111) and (100) by Raman spectroscopy, comparing with graphene films transferred on $SiO_2/Si$ substrate. In our study, the doping effect caused by charge transfer from Ni or $SiO_2/Si$ substrate to graphene was not observed. The bonding force between graphene and Ni substrate is stronger than that between graphene and $SiO_2/Si$. The graphene films grown on Ni substrate showed compressive strain and the growth of graphene films is incommensurate with Ni (100) lattice. The position of 2D band of graphene synthesized on Ni (111) and (100) substrate was different, and this result will be studied in the near future.

• Korean Journal of Materials Research
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• v.24 no.12
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• pp.694-699
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• 2014

We report the chemical vapor deposition growth characteristics of graphene on various catalytic metal substrates such as Ni, Fe, Ag, Au, and Pt. 50-nm-thick metal films were deposited on $SiO_2/Si$ substrates using dc magnetron sputtering. Graphene was synthesized on the metal/$SiO_2$/Si substrates with $CH_4$ gas (1 SCCM) diluted in mixed gases of 10% $H_2$ and 90 % Ar (99 SCCM) using inductively-coupled plasma chemical vapor deposition (ICP-CVD). The highest quality of graphene film was achieved on Ni and Fe substrates at $900^{\circ}C$ and 500 W of ICP power. Ni substrate seemed to be the best catalytic material among the tested materials for graphene growth because it required the lowest growth temperature ($600^{\circ}C$) as well as showing a low ICP power of 200W. Graphene films were successfully grown on Ag, Au, and Pt substrates as well. Graphene was formed on Pt substrate within 2 sec, while graphene film was achieved on Ni substrate over a period of 5 min of growth. These results can be understood as showing the direct CVD growth of graphene with a highly efficient catalytic reaction on the Pt surface.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.109.2-109.2
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• 2015

Graphene, as a single layer of $sp^2$-bonded carbon atoms packed into a 2D honeycomb crystal lattice, has attracted much attention due to its outstanding properties such as high carrier mobility, chemical stability, and optical transparency. In order to synthesize high quality graphene, transition metals, such as nickel and copper, have been widely employed as catalysts, which need transfer to desired substrates for various applications. However, the transfer steps inevitably induce defects, impurities, wrinkles, and cracks of graphene. Here, we report a facile transfer-free graphene synthesis method through nickel and carbon co-deposited layer, which does not require separately deposited catalytic nickel and carbon source layers. The 100 nm NiC layer was deposited on the top of $SiO_2/Si$ substrates by nickel and carbon co-deposition. When the sample was annealed at $1000^{\circ}C$, the carbon atoms diffused through the NiC layer and deposited on both sides of the layer to form graphene upon cooling. The remained NiC layer was removed by using nickel etchant, and graphene was then directly obtained on $SiO_2/Si$ without any transfer process. Raman spectroscopy was carried out to confirm the quality of resulted graphene layer. Raman spectra revealed that the resulted graphene was at high quality with low degree of $sp^3$-type structural defects. Furthermore, the Raman analysis results also demonstrated that gas flow ratio (Ar : $CH_4$) during the NiC deposition and annealing temperature significantly influence not only the number of graphene layers but also structural defects. This facile non-transfer process would consequently facilitate the future graphene research and industrial applications.

• Applied Science and Convergence Technology
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• v.27 no.5
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• pp.90-94
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• 2018

The electron band structure of manganese-adsorbed graphene on an SiC(0001) substrate has been studied using angle-resolved photoemission spectroscopy. Upon introducing manganese atoms, the conduction band of graphene, that is observed in pristine graphene indicating intrinsic electron-doping by the substrate, completely disappears and the valence band maximum is observed at 0.4 eV below Fermi energy. At the same time, the slope of the valence band decreases by the presence of manganese atoms, approaching the electron band structure calculated using the local density approximation method. The former provides experimental evidence of the formation of nearly free-standing graphene on an SiC substrate, concomitant with a metal-to-insulator transition. The latter suggests that its electronic correlations are efficiently screened, suggesting that the dielectric property of the substrate is modified by manganese atoms and indicating that electronic correlations in grpahene can also be tuned by foreign atoms. These results pave the way for promising device application using graphene that is semiconducting and charge neutral.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.371.2-371.2
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• 2016

Graphene electronics is one of the promising technologies for the next generation electronic devices due to the outstanding properties such as conductivity, high carrier mobility, mechanical, and optical properties along with extended applications using 2 dimensional heterostructures. However, large contact resistance between metal and graphene is one of the major obstacles for commercial application of graphene electronics. In order to achieve low contact resistance, numerous researches have been conducted such as gentle plasma treatment, ultraviolet ozone (UVO) treatment, annealing treatment, and one-dimensional graphene edge contact. In this report, we suggest a fabrication method of one-dimensional graphene metal edge contact without using graphene exfoliation. Graphene is grown on Cu foil by low pressure chemical vapor deposition. Then, the graphene is transferred on $SiO_2/Si$ wafer. The patterning of graphene channel and metal electrode is done by photolithography. $O_2$ plasma is applied to etch out the exposed graphene and then Ti/Au is deposited. As a result, the one-dimensional edge contact geometry is built between metal and graphene. The contact resistance of the fabricated one-dimensional metal-graphene edge contact is compared with the contact resistance of vertically stacked conventional metal-graphene contact.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.240.2-240.2
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• 2013

The device scale of flash memory was confronted with quantum mechanical limitation. The next generation memory device will be required a break-through for the device scaling problem. Especially, graphene is one of important materials to overcome scaling and operation problem for the memory device, because ofthe high carrier mobility, the mechanicalflexibility, the one atomic layer thick and versatile chemistry. We demonstrate the hybrid memory consisted with the metal-oxide quantum dots and the mono-layered graphene which was transferred to $SiO_2$ (5 nm)/Si substrate. The 5-nm thick secondary $SiO_2$ layer was deposited on the mono-layered graphene by using ultra-high vacuum sputtering system which base pressure is about $1{\times}10^{-10}$ Torr. The $In_2O_3$ quantum dots were distributed on the secondary $SiO_2$2 layer after chemical reaction between deposited In layer and polyamic acid layer through soft baking at $125^{\circ}C$ for 30 min and curing process at $400^{\circ}C$ for 1 hr by using the furnace in $N_2$ ambient. The memory devices with the $In_2O_3$ quantum dots on graphene monolayer between $SiO_2$ thin films have demonstrated and evaluated for the application of next generation nonvolatile memory device. We will discuss the electrical properties to understating memory effect related with quantum mechanical transport between the $In_2O_3$ quantum dots and the Fermi level of graphene layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.129.1-129.1
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• 2013

Atomically-thin graphene is the ideal model system for studying nanoscale friction due to its intrinsic two-dimensional anisotropy. Here, we report the reduced nanoscale friction of epitaxial graphene on SiC, investigated with conductive-probe atomic force microscopy/friction force microscopy in ultra-high vacuum. The measured friction on a buffer layer was found to be 1/8 of that on a monolayer of epitaxial graphene. Conductive probe atomic force microscopy revealed a lower conductance on the buffer layer, compared to monolayer graphene. We associate this difference in friction with the difference in total lateral stiffness. Because bending stiffness is associated with flexural phonons in two-dimensional systems, nanoscale frictional energy should primarily dissipate through damping with the softest phonons. We investigated the influence of hydrogen intercalation on the nanoscale friction. We found that the friction decreased significantly after hydrogen intercalation, which is related to loose contact between the graphene and the substrate that results in a lower bending stiffness.

• Applied Science and Convergence Technology
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• v.24 no.3
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• pp.53-59
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• 2015

The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.