• 제목/요약/키워드: Grain v1

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Inkjet 공정에서 발생하는 TIPS Pentacene Crystalline Morphology 변화에 따른 OTFT 특성 연구

  • Kim, Gyo-Hyeok;Seong, Si-Hyeon;Jeong, Il-Seop
    • Proceedings of the Korean Vacuum Society Conference
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.379-379
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    • 2013
  • 본 논문에서는 Normal ink jetting 공법으로 OTFT를 제작할 때 coffee stain effect에 의해서 반도체 소자의 특성이 저하되는 것을 극복하기 위해서 동일한 위치에 동일한 부피로 Droplet을 형성하는 Multiple ink jetting 공법을 통해 TIPS pentacene 결정의 Morphology와 전기적 특성이 어떻게 변화하는지 알아 보았다. Multiple ink jetting의 drop 횟수가 증가할수록 coffee stain effect에 의해서 형성된 가운데 영역의 Dendrite grain이 점점 작아지다가 7 Drops 이후로는 Big grain 만 남게 되었다. Active layer의 표면 Roughness는 drop 횟수가 증가할수록 낮아지다가 일정 count 이후로는 다시 높아지는 것을 확인할 수 있었다. 전계 이동도(mobility)는 drop 횟수가 증가할수록 커지다가 일정 count 이후로는 saturation되는 것을 확인할 수 있었다. Multiple ink jetting에 의해서 만들어진 OTFT 소자의 전계 이동도(mobility)는 1 drop과 10 drops에서 각각 0.0059, 0.036 cm2/Vs 로 6배 정도 차이가 있었다. 이것은 첫 drop에 의해 만들어진 가운데 Dendrite grain 영역이 Multiple ink jetting을 반복하면서 점점 작아지게 되어 사라지고 두꺼운 Grain 영역만 남게 된 것으로 판단된다. Vth 와 On/Off ratio는 1 drop과 10 drops에서 각각 -3 V, -2 V 그리고 $3.3{\times}10^3$, $1.0{\times}10^4$를 보였다. OTFT의 substrate로 Flexible한 polyethersulfone (PES) 기판을 사용하였고, 절연체로 Spin coating된 Poly-4-vinylphenol (PVP)가 사용되었으며, Gate 및 Source/Drain 전극은 Au를 50 nm 두께로 증착하였다. Channel의 width와 length는 각각 100 um, 40 um 였고, Gate 전극 위에 Active layer를 형성한 Bottom gate 구조로 제작되었다. Ink jet으로 제작된 TIPS pentacene의 결정성은 x-ray diffraction (XRD)와 광학 현미경으로 분석하였고 Thickness profile은 알파스텝 측정기를 이용하였으며, OTFT의 전기적 특성은 Keithley-4,200을 사용하여 측정하였다.

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Recent R&D status on friction stir welding of Ti and its alloys (티타늄과 그 합금의 마찰교반용접기술 현황)

  • Kang, Duck-Soo;Lee, Kwang-Jin
    • Journal of Welding and Joining
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    • 제33권2호
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    • pp.1-7
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    • 2015
  • This article describes the basic technical concepts for applying the friction stir welding (FSW) process to titanium and its alloys. Titanium and its alloys are demanding applications of FSW. During FSW, a protective atmosphere is needed at the welding region to prevent the joints from oxidation due to the absorption of interstitial elements (O, N, and H) at high temperature. The process parameters for FSW have great influence on the microstructure and properties of the joints. No phase transformation occurred in CP Ti because FSW was achieved below the ${\beta}$-transus temperature. Therefore, the mechanical properties of the joints with CP Ti were governed by recrystallization and grain refinement. Furthermore, the strong crystallographic texture indicating <0001>//ND formed in the stir zone. On the other hands, the phase transformation occurred in Ti-6Al-4V alloy because the process temperature reached above ${\beta}$-transus temperature. For this reason, the mechanical properties of the joints with Ti-6Al-4V alloy were altered by not only recry stallization and grain refinement but also phase transformation during FSW. Engineers who want to get sound FSW joints with Ti-6Al-4V alloy have to pay attention to the control about process conditions.

Micro-forming Ability of Ultrafine-Grained Magnesium Alloy Prepared by High-ratio Differential Speed Rolling (강소성압연법으로 제조된 초미세립 마그네슘 재료의 마이크로 성형능)

  • Yoo, Seong Jin;Kim, Woo Jin
    • Korean Journal of Metals and Materials
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    • 제49권2호
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    • pp.104-111
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    • 2011
  • An ultrafine grained Mg-9Al-1Zn magnesium alloy with the mean grain size less than $1{\mu}m$ was produced by using high-ratio differential speed rolling. The processed alloy exhibited excellent superplasticity at relatively low temperatures. The micro-forming tests were carried out using a micro-forging apparatus with micro V-grooved shaped dies made of silicon and the micro-formability was evaluated by means of micro-formability index, $R_f$ ($=A_f/A_g$, $A_f$: formed and inflowed area into the V-groove, $A_g$: area of the V-groove). The $R_f$ value increased with temperature up to $280^{\circ}C$ and then decreased beyond $300^{\circ}C$. The decrease of the $R_f$ value at $300^{\circ}C$ was attributed to the accelerated grain coarsening. Increasing the micro-forging pressure increased the $R_f$ values. At a given die geometry, die filling ability decreased as the die position moved away from the die center to the end. FEM simulation predicted this behavior and a method of improving this problem was proposed.

Electrical Properties of Pr-doped ZnO Varistors (Pr-첨가 ZnO 바리스터의 전기적 특성)

  • 곽민환;이상기;조성걸
    • Journal of the Korean Ceramic Society
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    • 제34권12호
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    • pp.1275-1281
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    • 1997
  • ZnO varistors containing 5.0 at% Co3O4 and Pr6O11, ranging from 0.1 to 1.0 at%, were sintered at 130$0^{\circ}C$ and 135$0^{\circ}C$. The I-V characteristics and nonlinear coefficients of the specimens were investigated with respect to Pr addition and sintering temperature. In general the specimens sintered at 130$0^{\circ}C$ showed better varistor characteristic than those fired at 135$0^{\circ}C$, which seemed to be related with the liquid phase formation during sintering. The barrier heights obtained from C-V relations, 0.29-1.36 eV, were different from those acquired using resistivity-temperature plots measured at low voltage per grain boundary. Therefore the estimation of potential barrier heights using C-V relations is better suited for the specimens prepared in this study. The carrier densities obtained using C-V relations were ~1018 cm-3.

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Optical and Optoelectric Properties of PbCdS Ternary Thin Films Deposited by CBD

  • Mohammed, Modaffer. A.;Mousa, Ali M.;Ponpon, J.P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제9권2호
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    • pp.117-123
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    • 2009
  • $Pb_{x}Cd_{1-x}S$ films are prepared in the composition range of 0.05${\leq}x{\leq}$0.25, using a chemical bath deposition growth technique under optimum conditions amide at realizing good photo response. The x-ray diffraction results show that the films are of PbS-CdS composite with individual CdS and PbS planes. The films exhibit two direct band gaps, 2.4 eV attributed to CdS, while the other varies continuously from 2.4 eV to 1.3 eV. The films surface morphology is smooth with crystallite, whose grain size increases with increasing mole fraction (x). The decrease in band gap with increase in lead concentration suggests inter-metallic compound of PbS (Eg=0.41 eV) with CdS (Eg=2.4 eV)

Electrical Characteristics of (BaSr)TiO3-based PTCR Devices under the Electric Field

  • Lee, Joon-Hyung;Cho, Sang-Hee
    • Journal of the Korean Ceramic Society
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    • 제39권1호
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    • pp.16-20
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    • 2002
  • Semiconducting (Ba.Sr)TiO$_3$ceramic device, which shows the PTCR effect, has been usually used as a current limiter. In this case, the device should endure the condition under the high electric field. In this study, the dynamic electrical properties of the PTCR device under high voltage has been evaluated. Two different formulated powders were used and the sintered bodies exhibited the different grain size and porosity. The wide range of characterization such as complex impedance spectroscopy, microstructure, I-V characteristics and voltage dependence of resistivity of the samples were performed. The PTCR effect of the specimen containing coarse grains was very sensitively dependent on the AC electric field, showing that it was inversely pro-portional to the grain boundary potential barrier. The withstanding voltage was proportional to the potential barrier of grain boundary.

Electrical Properties of Zinc Oxide Varistor with $\alpha-Zn_7Sb_2O_{12}$ ($\alpha-Zn_7Sb_2O_{12}$ 첨가에 의한 Zinc Oxide 바리스터의 전기적 특성)

  • 김경남;한상목
    • Journal of the Korean Ceramic Society
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    • 제31권11호
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    • pp.1396-1400
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    • 1994
  • Electrical properties in the ZnO-Bi2O3-CoO-Zn7Sb2O12 system were investigated with Zn7Sb2O12 content (0.1~2 mol%). The increase of the Zn7Sb2O12 content inhibited the grain growth of ZnO, which showed a narrow grain size distribution of ZnO. The breakdown voltage (Vb) increased markedly with 1 mol% Zn7Sb2O12 addition due to the grain growth control behaviour of the Zn7Sb2O12 . The nonlinear I-V characteristic was significantly influenced by the Zn7Sb2O12 content (or Bi2O3/Zn7Sb2O12 ratio). Addition of 0.5 mol% Zn7Sb2O12 showed the highest nonlinear coefficient ($\alpha$) of 43. The leakage current in prebreakdown region was decreased with increasing Zn7Sb2O12 content.

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The Effects of Nanocrystalline Silicon Thin Film Thickness on Top Gate Nanocrystalline Silicon Thin Film Transistor Fabricated at 180℃

  • Kang, Dong-Won;Park, Joong-Hyun;Han, Sang-Myeon;Han, Min-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권2호
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    • pp.111-114
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    • 2008
  • We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.

A Microstructural and Electrical Properties of $WO_3$-Doped ZnO Varistors ($WO_3$가 첨가된 ZNO 바리스터의 미세구조적, 전기적 특성)

  • 정순철;박춘현;남춘우
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 1998년도 추계학술대회 논문집
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    • pp.275-279
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    • 1998
  • The influence of $WO_3$ (0.5-4.0mol%) on the microstructural and electrical properties of ZnO varistors was investigated. The major part of a tungsten segregated to the nodal point. SEM, EDAX, and XRD analysis revealed that three phase, such as W-rich phase, Bi-rich phase, and spinel phase, coexist at the nodal point. The average grain size increased in the range of 15.5-29.9pm with increasing $WO_3$ content. This may be probably attributed to liquid phase formed by $WO_3$, $WO_3$ acted as promotion additive of grain growth. As $WO_3$ content increase, the varistor voltage greatly decreased in the range 186.82-35.87V/mm due to the increase of grain growth. The barrier height decreased in the range 1.93-0.42eV with increasing $WO_3$content.

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Capacitive-Voltage properties of$(Sr{\cdot}Ca)TiO_{3}$ Ceramics ($(Sr{\cdot}Ca)TiO_{3}$ 세라믹스의 용량-전압 특성)

  • Kang, Jae-Hun;Choi, Woon-Shik;Kim, Chung-Hyeok;Kim, Jin-Sa;Park, Yong-Pill;Song, Min-Jong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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    • pp.34-37
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    • 2001
  • In this study, the capacitance-voltage properties of $(Sr_{1-x}\cdot Ca_x)TiO_3(0.05{\leq}x{\leq}0.20)$-based grain boundary layer ceramics were investigated. The ceramics were fabricated by the conventional mixed oxide method. The sintering temperature and time were $1480\sim1500^{\circ}C$ and 4 hours. respectively. The 2nd phase formed by the thermal diffusion of CuO from the surface leads to very excellent dielectric properties, that is, ${\varepsilon}_r$ >50000, tan$\delta$ <0.05, ${\Delta}C$ < ${\pm}10%.$ The capacitance is almost unchanged below about 20[V] but it decreases slowly about 20[V]. The results of the capacitance-voltage properties indicated that the grain boundary was composed of the continuous insulating layers.

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