• Title/Summary/Keyword: Generated power

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A New Structural Carry-out Circuit in Full Adder (새로운 구조의 전가산기 캐리 출력 생성회로)

  • Kim, Young-Woon;Seo, Hae-Jun;Han, Se-Hwan;Cho, Tae-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.1-9
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    • 2009
  • A full adders is an important component in applications of digital signal processors and microprocessors. Thus it is imperative to improve the power dissipation and operating speed for designing a full adder. We propose a new adder with modified version of conventional static CMOS and pass transistor logic. The carry-out generation circuit of the proposed full adder is different from the conventional XOR-XNOR structure. The output Cout of module III is generated from input A, B and Cin directly without passing through module I as in conventional structure. Thus output Cout is faster by reducing operation step. The proposed module III uses the static CMOS logic style, which results full-swing operation and good driving capability. The proposed 1bit full adder has the advantages over the conventional static CMOS, CPL, TGA, TFA, HPSC, 14T, and TSAC logic. The delay time is improved by 4.3% comparing to the best value known. PDP(power delay product) is improved by 9.8% comparing to the best value. Simulation has been carried out using a $0.18{\mu}m$ CMOS design rule for simulation purposes. The physical design has been verified using HSPICE.

Optimized Hardware Design of Deblocking Filter for H.264/AVC (H.264/AVC를 위한 디블록킹 필터의 최적화된 하드웨어 설계)

  • Jung, Youn-Jin;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.1
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    • pp.20-27
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    • 2010
  • This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

High Gain and Broadband SAP Antenna with Two Parasitic Patches (두 개의 기생 패치를 갖는 고 이득.광대역 SAP 안테나)

  • Kim, Jung-Han;Kim, Yong-Jin;Lee, Hong-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.8
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    • pp.930-936
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    • 2007
  • In this paper, the high gain and broadband antenna operating for SDMB(Satellite Digital Multimedia Broadcasting) system is realized, The proposed antenna consists of the SAP(Shorted Annular Patch) structure, which inhibits surface-wave and the parasitic SAP element with spacing of $0.25 {\lambda}_0$ in order to improve gain, bandwidth and directivity. The RHCP(Right Hand Circular Polarization) is generated by two slits, which are made along the periphery of the circular patch at the diametrically opposite points, The simulated maximum gain of the proposed antenna is 12.6 dBi, which is better 5.22 dBi than maximum gain of the conventional microstrip patch antenna. The measured maximum gain is 10.5dBi at operating frequency 2.63GHz. Also, the measured impedance bandwidth$(VSWR{\leq}2)$ of the proposed antenna is $360MHz(2.488{\sim}2.848 GHz)$, which is better 300 MHz than the bandwidth of the conventional microstrip patch antenna. The measured HPBW(Half Power Beam Width) of the proposed antenna is $45.8^{\circ}$, and the measured FBR(Front to Back Ratio) is 15.49 dBi, The 3dB axial ratio bandwidth is 220 MHz$(2.54{\sim}2.76 GHz)$.

Performance Analysis and Compensation of FH/SC-FDMA System for the High-Speed Communication in Jamming Channel (재밍 채널에서 고속 통신을 위한 주파수 도약 SC-FDMA 통신 시스템의 성능 분석과 보상)

  • Kim, Jang-Su;Jo, Byung-Gak;Baek, Gwang-Hoon;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.6
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    • pp.551-561
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    • 2009
  • FH system is very robust to the jamming interference. OFDM system is very good for the high speed communication system. But, it has high PAPR. SC-FDMA system based on OFT-spread OFDM was proposed to reduce high PAPR. Therefore, in this paper, we like to introduce the FH system into SC-FDMA system, which can be best solution to the jamming hostile environment and for the high power efficiency. Also, OFDM is very sensitive to ICI. Especially, ICI generated by frequency offset and phase noise breaks the orthogonality among sub-carriers, which seriously degrades the system performance. We analyze the performance of the FH SC-FDMA system in the PBJ and MTJ channel. In this paper, the ICI effects caused by phase noise, frequency offset and Doppler effects are analyzed and we like to propose the PNFS algorithm in the equalizer to compensate the ICI influences. Through the computer simulations, we can confirm the performance improvement.

Development of Backfill Materials for Underground Power Cables Considering Thermal Effect (열특성 효과를 고려한 지중송전관로용 되메움재 개발)

  • Lee Dae-Soo;Kim Dae-Hong;Hong Sung-Yun
    • Journal of the Korean Geotechnical Society
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    • v.21 no.6
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    • pp.41-52
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    • 2005
  • Because the allowable current loading of buried electrical transmission cables is frequently limited by the maximum permissible temperature of the cable or of the surrounding ground, there is a need fur cable backfill materials that can maintain a low thermal resistivity even while subjected to high temperatures for prolonged periods. Temperatures greater than $50^{\circ}C\;to\;60^{\circ}C$ may lead to breakdown of cable insulation and thermal runaway if the surrounding backfill material is unable to dissipate the heat as rapidly as it is generated. This paper describes the results of studies aimed at the development of backfill material to reduce the thermal resistivity. A large number of different additive materials were tested to determine their applicability as a substitute material. Tests were carried out for Dongrim river sand, a relatively uniform sand of very high thermal resistivity, $50^{\circ}C-cm/watt\;at\;10\%$ water content, $260^{\circ}C-cnuwatt$ when dry, and Jinsan granite screenings, and D-2 (sand and granite screenings mixture), E-1 (rubble and granite screenings mixture), a well-graded materials with low thermal resistivity, about $35^{\circ}C-cm/watt$ when at 10 percent water content, $100^{\circ}C-cm/watt$ when dry. Based on this research, 3 types of backfill materials were suggested for improved materials with low thermal resistivity and the applicability was assessed through field tests.

Enhanced Light Harvesting by Fast Charge Collection Using the ITO Nanowire Arrays in Solid State Dye-sensitized Solar Cells

  • Han, Gill Sang;Yu, Jin Sun;Jung, Hyun Suk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.463-463
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    • 2014
  • Dye-sensitized solar cells (DSSCs) have generated a strong interest in the development of solid-state devices owing to their low cost and simple preparation procedures. Effort has been devoted to the study of electrolytes that allow light-to-electrical power conversion for DSSC applications. Several attempts have been made to substitute the liquid electrolyte in the original solar cells by using (2,2',7,7'-tetrakis (N,N-di-p-methoxyphenylamine)-9-9'-spirobi-fluorene (spiro-OMeTAD) that act as hole conductor [1]. Although efficiencies above 3% have been reached by several groups, here the major challenging is limited photoelectrode thickness ($2{\mu}m$), which is very low due to electron diffusion length (Ln) for spiro-OMeTAD ($4.4{\mu}m$) [2]. In principle, the $TiO_2$ layer can be thicker than had been thought previously. This has important implications for the design of high-efficiency solid-state DSSCs. In the present study, we have fabricated 3-D Transparent Conducting Oxide (TCO) by growing tin-doped indium oxide (ITO) nanowire (NWs) arrays via a vapor transport method [3] and mesoporous $TiO_2$ nanoparticle (NP)-based photoelectrodes were prepared using doctor blade method. Finally optimized light-harvesting solid-state DSSCs is made using 3-D TCO where electron life time is controlled the recombination rate through fast charge collection and also ITO NWs length can be controlled in the range of over $2{\mu}m$ and has been characterized using field emission scanning electron microscopy (FE-SEM). Structural analyses by high-resolution transmission electron microscopy (HRTEM) and X-Ray diffraction (XRD) results reveal that the ITO NWs formed single crystal oriented [100] direction. Also to compare the charge collection properties of conventional NPs based solid-state DSSCs with ITO NWs based solid-state DSSCs, we have studied intensity modulated photovoltage spectroscopy (IMVS), intensity modulated photocurrent spectroscopy (IMPS) and transient open circuit voltages. As a result, above $4{\mu}m$ thick ITO NWs based photoelectrodes with Z907 dye shown the best performing device, exhibiting a short-circuit current density of 7.21 mA cm-2 under simulated solar emission of 100 mW cm-2 associated with an overall power conversion efficiency of 2.80 %. Finally, we achieved the efficiency of 7.5% by applying a CH3NH3PbI3 perovskite sensitizer.

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Structural Analysis of Power Transmission Mechanism of Electro-Mechanical Brake Device for High Speed Train (고속열차용 전기기계식 제동장치의 동력전달 기구물에 대한 구조해석)

  • Oh, Hyuck Keun;Beak, Seung-Koo;Jeon, Chang-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.12
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    • pp.237-246
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    • 2019
  • The Electro-Mechanical Brake (EMB) is the next generation braking system for automobiles and railway vehicles. Current brake systems for high-speed trains generate a braking force using a pneumatic cylinder, but EMB systems produce that force through a combination of an electric motor and a gear. In this study, an EMB operation mechanism capable of generating a high braking force was proposed, and structural and vibration analyses of the gears and shafts, which are the core parts of the mechanisms, were performed. Dynamic structural analysis confirmed that the maximum stress in the analysis model was within the yield strength of the material. In addition, the design that maximizes the diameter of the motor shaft was found to be advantageous in strength, and large shear stress could be generated in the bolt fixing the gear and eccentric shaft. In addition, a test apparatus that can reproduce the mechanism of the analytical model was fabricated to measure the strain of the fixed bolt part, which is the most vulnerable part. The strain measurement results showed that the error between the analysis and measurement was within 10%, which could verify the accuracy of the analytical model.

Development of Current Limiting COS Fuse Link with Improved Overcurrent and Protection Coordination performance (과전류 차단과 보호협조 성능이 향상된 한류형 COS 퓨즈링크 개발)

  • Kim, Youn-Hyun;Kim, Young-Ju
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.21 no.3
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    • pp.129-136
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    • 2020
  • A Cut Out Switch (COS) is used for line protection and pole transformer protection in power systems. The COS used to protect the pole transformer is installed on the power side of the pole transformer to protect the electric equipment from fault currents. The COS is composed largely of a body and a fuse holder, and when the fault current is energized, the element of the fuse link in the fuse holder is melted to block the fault current. The arc generated when the COS fuse link is blown causes fire and noise, causing discomfort to residents in the surrounding area, and the arc flame can cause secondary damage to the peripheral device. In this study, a current-limiting COS fuse with improved overcurrent blocking performance rather than explosion type was developed to solve the arc and noise problems during COS operation. The overcurrent breaking performance of the current-limiting COS improves the reliability by developing a striker and COS fuse bracket. In addition, this study aimed to verify the performance of the developed current-limiting COS fuse through a test at an authorized institution.

Analytical Evaluation of Residual Stresses in Dissimilar Metal Weld for Cast Stainless Steel Pipe and Low-Alloy Steel Component Nozzle (스테인리스주강 배관과 저합금강 기기노즐 이종금속용접부 잔류응력의 해석적 평가)

  • Park, June-Soo;Song, Min-Seop;Kim, Jong-Soo;Kim, In-Yong;Yang, Jun-Seog
    • Proceedings of the KWS Conference
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    • 2009.11a
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    • pp.100-100
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    • 2009
  • This paper is concerned with numerical analyses of residual stresses in welds and material's susceptibility to stress corrosion cracking (SCC) for the primary piping system in nuclear power plants: Both the dissimilar metal weld (DMW) for stainless steel to low alloy steel joints and the similar metal weld (SMW) for forged stainless steel to cast stainless steel joints are considered. Thermal elasto-plastic analyses using the finite element method (FEM) are performed to predict residual stresses generated in fabrication welding and its related processes for both the DMW and SMW, including effects of quenching for cast stainless steel piping, machining of the DMW root, and grinding of the SMW root. As a result, the effect of quenching should be included in the evaluation of residual stresses in the SMW for the cast stainless steel piping. It is deemed that residual stresses in both the DMW and SMW would not affect the SCC susceptibility of the welds providing that the welding processes are completed without any weld repair on the inside wall of the joint. However, the grinding process if performed on the safe-end to piping weld, would produce a high level of residual stresses in the inner surface region and thus a stress improvement process (e.g. buffing) should be considered to reduce susceptibilities to SCC.

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The Study on the Separation Characteristics of ion with ion Exchange Membrane - I.The Characteristics of ion Exchange Membrane with the Separator of All-Vanadium Redox Flow Battery - (이온교환막을 이용한 이온의 분리특성에 관한 연구 - I. 전바나듐계 레독스-흐름 전지의 격막용 이온 교환막의 특성 -)

  • Kang, An-Soo
    • Applied Chemistry for Engineering
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    • v.4 no.2
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    • pp.393-402
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    • 1993
  • Redox flow secondary battery have been studied actively as one of the most promising electrochemical energy storage devices for a wide range of applications, such as electric vehicles, photovoltaic arrays, and excess power generated by electric power plants. In all-vanadium redox flow battery using solution of vanadium-sulfuric acid as a active material, the difficulty in developing an efficient ion selective membrane can still be identified. The asymmetric cation exchange membrane(M-30) as a separator of all-vanadium redox flow battery which were obtained by the reaction of chlorosulfonation for 30 minutes under the irradiation of UV, showed its superiority in the transport number of 0.94 and electrical resistivity of $0.5{\Omega}{\cdot}cm^2$. The base membrane were prepared by lamination a low density polyethlene film of $10{\mu}m$ thickness on polyolefin membrane(HIPORE 120). The electrical resistivity of M-30 membrane in real solution of vanadium-sulfuric acid was $3.79{\Omega}{\cdot}cm^2$ and it was similar to that of Nafion 117 membrane. Also the cell resistivity was $6.6{\Omega}{\cdot}cm^2$and lower than that of Nafion 117. In considertion of electrochemical properties and costs of membranes, M-30 membrane was better than that of Nafion 117 and CMV of Asahi glass Co. as a separator of all-vanadium redox flow battery.

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