• Journal of Radiopharmaceuticals and Molecular Probes
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• v.6 no.2
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• pp.61-68
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• 2020

Aggregated neurofibrillary tangles (NFTs) are a pathological hallmark in Alzheimer's disease (AD) and many radiopharmaceuticals targeting NFTs have been developed so far. Among these, [¹⁸F]flortaucipir (TAUVID^TM) is the first approved radiopharmaceutical in the Food and Drug Administration (FDA) to image tau pathology. In the present study, we describe the optimized radiosynthetic method for the routine production of [¹⁸F] flortaucipir using a commercialized automation module (i.e. GE TRACERlab^TM FX_FN pro). [¹⁸F]Flortaucipir was prepared by nucleophilic substitution from its N-tert-butoxycarbonyl protected nitro precursor, tertbutyl 7-(6-nitropyridin-3-yl)-5H-pyrido[4,3-b]indole-5-carboxylate, at 130℃ for 10 min in dimethyl sulfoxide. The mean radiochemical yield was 20 ± 4.3% (decay-corrected, n = 47) with the molar activity of 218 ± 32 GBq/µmol at the end of synthesis. The radiochemical purity was determined to be above 95%. The overall production time including quality control is approximately 100min. The final produced [¹⁸F]flortaucipir injection meets the USP criteria for quality control. Thus, this fully automated system is validated for clinical use.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.795-803
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• 2017

This paper describes a dual-standard cryptographic processor that efficiently integrates two block ciphers ARIA and AES into a unified hardware. The ARIA-AES crypto-processor was designed to support 128-b and 256-b key sizes, as well as four modes of operation including ECB, CBC, OFB, and CTR. Based on the common characteristics of ARIA and AES algorithms, our design was optimized by sharing hardware resources in substitution layer and in diffusion layer. It has on-the-fly key scheduler to process consecutive blocks of plaintext/ciphertext without reloading key. The ARIA-AES crypto-processor that was implemented with a $0.18{\mu}m$ CMOS cell library occupies 54,658 gate equivalents (GEs), and it can operate up to 95 MHz clock frequency. The estimated throughputs at 80 MHz clock frequency are 787 Mbps, 602 Mbps for ARIA with key size of 128-b, 256-b, respectively. In AES mode, it has throughputs of 930 Mbps, 682 Mbps for key size of 128-b, 256-b, respectively. The dual-standard crypto-processor was verified by FPGA implementation using Virtex5 device.