• Title/Summary/Keyword: Gate oxide field

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A New Poly-Si TFT Employing Air-Cavities at the Edge of Gate Oxide (게이트 산화막 가장자리에 Air-cavity를 가지는 새로운 구조의 다결정 실리콘 박막 트랜지스터)

  • Lee, Min-Cheol;Jung, Sang-Hoon;Song, In-Hyuk;Han, Min-Koo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.50 no.8
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    • pp.365-370
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    • 2001
  • We have proposed and fabricated a new poly-Si TFT employing air-cavities at the edges of gate oxide in order to reduce the vertical electric field induced near the drain due to low dielectric constant of air. Air-cavity has been successfully fabricated by employing the wet etching of gate oxide and APCVD (Atmospheric pressure chemical vapor deposition) oxide deposition. Our experimental results show that the leakage current of the proposed TFT is considerably reduced by the factor of 10 and threshold voltage shift under high gate bias is also reduced because the carrier injection into gate insulator over the drain depletion region is suppressed.

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Development of Gate Structure in Junctionless Double Gate Field Effect Transistors (이중게이트 구조의 Junctionless FET 의 성능 개선에 대한 연구)

  • Cho, Il Hwan;Seo, Dongsun
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.514-519
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    • 2015
  • We propose the multiple gate structure of double gate junctionless metal oxide silicon field oxide transistor (JL MOSFET) for device optimization. Since different workfunction within multiple metal gates, electric potential nearby source and drain region is modulated in accordance with metal gate length. On current, off current and threshold voltage are influenced with gate structure and make possible to meet some device specification. Through the device simulation work, performance optimization of double gate JL MOSFETs are introduced and investigated.

Fabrication of the silicon field emitter araays with H$_{2}$O densified oxide as a gate insulator (H$_{2}$O 분위기에서 치밀화시킨 (densified) 산화막을 게이트 절연막으로 갖는 실리콘 전계방출소자의 제작)

  • 정호련;권상직;이종덕
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.171-175
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    • 1996
  • Gate insulator for Si field emitter is usually formed by e-beam evaporation. However, the evaported oxide requires densification for a stable process and a reduction of gate leakage which results from its Si-rich and nonstoicheiometric structure. In this study, we have developed the process technology able to densify the evaporated oxide in H$_{2}$O ambient. Using this process, we have fabricted thefield emitter array with 625 emitters per pixel, of which gate hole diameter is 1.4.mu.m, for the pixel, anode current of 14.3.mu.A was extracted at a gate bias of 100V and gate leakage was about 0.27% of the total emission current.

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Breakdown characteristics of gate oxide with tungsten polycide electrode (텅스텐 폴리사이드 전극에 따른 게이트 산화막의 내압 특성)

  • 정회환;이종현;정관수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.12
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    • pp.77-82
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    • 1996
  • The breakdown characteristics of metal-oxide-semiconductor(MOS) capacitors fabricated by Al, polysilicon, and tungsten polycide gate electrodes onto gate oxide was evaluated by time zero dielectric breakdwon (TZDB). The average breakdown field of the gate oxide with tungsten polycide electride was lower than that of the polysilicon electrode. The B model (1~8MV/cm) failure of the gate oxide with tungsten polycide electrode was increased with increasing annealing temperature in the dry $O_{2}$ ambient. This is attributed ot fluorine and tungsten diffusion from thungsten silicide film into the gate oxide, and stress increase of tungsten polcide after annealing treatment.

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A Study on Characteristics of Wet Oxide Gate and Nitride Oxide Gate for Fabrication of NMOSFET (NMOSFET의 제조를 위한 습식산화막과 질화산화막 특성에 관한 연구)

  • Kim, Hwan-Seog;Yi, Cheon-Hee
    • The KIPS Transactions:PartA
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    • v.15A no.4
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    • pp.211-216
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    • 2008
  • In this paper we fabricated and measured the $0.26{\mu}m$ NMOSFET with wet gate oxide and nitride oxide gate to compare that the charateristics of hot carrier effect, charge to breakdown, transistor Id_Vg curve, charge trapping, and SILC(Stress Induced Leakage Current) using the HP4145 device tester. As a result we find that the characteristics of nitride oxide gate device better than wet gate oxide device, especially hot carrier lifetime(nitride oxide gate device satisfied 30 years, but the lifetime of wet gate oxide was only 0.1 year), variation of Vg, charge to breakdown, electric field simulation and charge trapping etc.

Adjusting the Sensitivity of an Active Pixel Sensor Using a Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor-Type Photodetector With a Transfer Gate (전송 게이트가 내장된 Gate/Body-Tied P-Channel Metal-Oxide Semiconductor Field-Effect Transistor 구조 광 검출기를 이용한 감도 가변형 능동 화소 센서)

  • Jang, Juneyoung;Lee, Jewon;Kwen, Hyeunwoo;Seo, Sang-Ho;Choi, Pyung;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.30 no.2
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    • pp.114-118
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    • 2021
  • In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.

ITO Extended Gate Reduced Graphene Oxide Field Effect Transistor For Proton Sensing Application

  • Truong, Thuy Kieu;Nguyen, T.N.T.;Trung, Tran Quang;Son, Il Yung;Kim, Duck Jin;Jung, Jin Heak;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.653-653
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    • 2013
  • In this study, ITO extended gate reduced graphene oxide field effect transistor (rGO FET) was demonstrated as a transducer for a proton sensing application. In this structure, the sensing area is isolated from the active area of the device. Therefore, it is easy to deposit or modify the sensing area without affecting on the device performance. In this case, the ITO extended gate was used as a gate electrode as well as a proton sensing material. The proton sensing properties based on the rGO FET transducer were analyzed. The rGO FET device showed a high stability in the air ambient with a TTC encapsulation layer for months. The device showed an ambipolar characteristic with the Dirac point shift with varying the pH solutions. The sensing characteristics have offered the potential for the ion sensing application.

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Fabrication and Properties of Under Gate Field Emitter Array for Back Light Unit in LCD

  • Jung, Yong-Jun;Park, Jae-Hong;Jeong, Jin-Soo;Nam, Joong-Woo;Berdinsky, Alexander S.;Yoo, Ji-Beom;Park, Chong-Yun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1530-1533
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    • 2005
  • We investigated under-gate type carbon nanotube field emitter arrays (FEAs) for back light unit (BLU) in liquid crystal display (LCD). Gate oxide was formed by wet etching of ITO coated glass substrate instead of depositing $SiO_2$ on the glass substrate. Wet etching is easer and simpler than depositing and etching of thick gate oxide to isolate the gate metal from cathode electrode in triode. Field emission characteristic s of triode structure were measured. The maximum current density of 92.5 ${\mu}A/cm^2$ was when the gate and anode voltage was 95 and 2500 V, respectively at the anode-cathode spacing of 1500 ${\mu}m$.

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Microfabrication of Vertical Carbon Nanotube Field-Effect Transistors on an Anodized Aluminum Oxide Template Using Atomic Layer Deposition

  • Jung, Sunghwan
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1169-1173
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    • 2015
  • This paper presents vertical carbon nanotube (CNT) field effect transistors (FETs). For the first time, the author successfully fabricated vertical CNT-based FETs on an anodized aluminum oxide (AAO) template by using atomic layer deposition (ALD). Single walled CNTs were vertically grown and aligned with the vertical pores of an AAO template. By using ALD, a gate oxide material (Al2O3) and a gate metal (Au) were centrally located inside each pore, allowing the vertical CNTs grown in the pores to be individually gated. Characterizations of the gated/vertical CNTs were carried and the successful gate integration with the CNTs was confirmed.

A Study on the Current Kink Effect in NMOSFET SOI Device with the Varying Gate Oxide Thickness (NMOSFET SOI 소자에서 부분적 게이트 산화막 두께 변화에 의한 돌연 전류 효과 고찰)

  • 한명석;이충근홍신남
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.545-548
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    • 1998
  • Thin film SOI(Silicon-On-Insulator) devices exhibit floating body effect. In this paper, SOI NMOSFET is proposed to solve this problem. Some part of gate oxide was considered to be 30nm~80nm thicker than the other normal gate oxide and simulated with TSUPREM-4. The I-V characteristics were simulated with 2D MEDICI mesh. Since part of gate oxide has different oxide thickness in proposed device, the gate electric field strength is not the same throught the gate and consequently the reduction of current kink effect is occurred.

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