• Title/Summary/Keyword: Gate Insulator Thin Film

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Pentacene TFTs and Integrated Circuits with PVP as Gate Insulator

  • Xu, Yong-Xian;Byun, Hyun-Sook;Song, Chung-Kun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1027-1029
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    • 2004
  • In this paper, we have fabricated pentacene thin film transistors (TFTs) using polyvinylphenol (PVP) copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and cross-link material the performance has been changed. We obtained the best device performance with the mobility of 0.32cm2/V${\cdot}$sec and the on/off current ratio of 1.19${\times}$106 for the case of 10wt% PVP copolymer mixed with 5wt% poly (melamine-co-formaldehyde). Additionally using pentacene TFTs with the above PVP gate insulator, we fabricated the integrated circuits including inverter which produced the gain of 9.7.

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Low-Temperature Processable Polyimide Gate Insulator and Hybridization Approach for High Performance Pentacene Thin Film Transistor

  • Ahn, Taek;Kim, Jin-Woo;Yi, Mi-Hye
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.871-874
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    • 2007
  • We have synthesized a novel fully soluble and low-temperature processable polyimide gate insulator (KSPI) through one-step condensation polymerization. For the preparation of KSPI, 5- (2,5-dioxytetrahydrofuryl)-3-methly-3-cyclohexene- 1,2-dicarboxylic anhydride (DOCDA) and 4,4- diaminodiphenylmethane (MDA) were used as monomers and fully imidized KSPI was completely soluble in organic solvents like ${\gamma}-butyrolactone$ and 2-butoxyethanol, etc.

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Fabrication of Organic Thin-Film Transistor Using Vapor Deposition Polymerization Method (Vapor Deposition Polymerization 방법을 이용한 유기 박막 트렌지스터의 제작)

  • 표상우;김준호;김정수;심재훈;김영관
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.190-193
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    • 2002
  • The processing technology of organic thin-film transistors (Ons) performances have improved fur the last decade. Gate insulator layer has generally used inorganic layer, such as silicon oxide which has properties of a low electrical conductivity and a high breakdown field. However, inorganic insulating layers, which are formed at high temperature, may affect other layers termed on a substrate through preceding processes. On the other hand, organic insulating layers, which are formed at low temperature, dose not affect pre-process. Known wet-processing methods for fabricating organic insulating layers include a spin coating, dipping and Langmuir-Blodgett film processes. In this paper, we propose the new dry-processing method of organic gate dielectric film in field-effect transistors. Vapor deposition polymerization (VDP) that is mainly used to the conducting polymers is introduced to form the gate dielectric. This method is appropriate to mass production in various end-user applications, for example, flat panel displays, because it has the advantages of shadow mask patterning and in-situ dry process with flexible low-cost large area displays. Also we fabricated four by four active pixels with all-organic thin-film transistors and phosphorescent organic light emitting devices.

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Stability of Organic Thin-Film Transistors Fabricated by Inserting a Polymeric Film (고분자막을 점착층으로 사용한 유기 박막 트랜지스터의 안정성)

  • Hyung, Gun-Woo;Pyo, Sang-Woo;Kim, Jun-Ho;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.61-62
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    • 2006
  • In this paper, it was demonstrated that organic thin- film transistors (OTFTs) were fabricated with the organic adhesion layer between an organic semiconductor and a gate insulator by vapor deposition polymerization (VDP) processing. In order to form polymeric film as an adhesion layer, VDP process was also introduced instead of spin-coating process, where polymeric film was co-deposited by high-vacuum thermal evaporation from 6FDA and ODA followed by curing. The saturated slop in the saturation region and the subthreshold nonlinearity in the triode region were c1early observed in the electrical output characteristics in our organic thin film transistors using the staggered-inverted top-contact structure. Field effect mobility, threshold voltage, and on-off current ratio in 15-nm-thick organic adhesion layer were about $0.5\;cm^2/Vs$, -1 V, and $10^6$, respectively. We also demonstrated that threshold voltage depends strongly on the delay time when a gate voltage has been applied to bias stress.

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Electrical Properties of Organic PVA Gate Insulator Film on ITO/Glass Substrates (ITO/glass 기판위에 제작된 Cross linked PVA 유기 게이트 절연막의 전기적 특성)

  • Choi, Jin-Eun;Gong, Su-Cheol;Jeon, Hyeong-Tag;Park, Hyung-Ho;Chang, Ho-Jung
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.4
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    • pp.1-5
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    • 2010
  • The PVA (poly-vinyl alcohol) insulators were spun coated onto ITO coated glass substrates with the capacitors of Glass/ITO/PVA/Al structure. The effects of PVA concentrations (3.0, 4.0 and 5.0 wt%) on the morphology and electrical properties of the films were investigated. As the concentration of PVA increased from 3.0 to 5.0 wt%, the leakage current of device decreased from 17.1 to 0.23 pA. From the AFM measurement, the RMS value decreased with increasing PVA concentration, showing the improvement of insulator film roughness. The capacitances of the films with PVA concentrations of 4.0 and 5.0 wt% were about 28.1 and 24.2 nF, respectively. The lowest leakage current of 1.77 PA was obtained at the film thickness of 117.5 nm for the device with fixed PVA concentration of 5.0 wt%.

Evaluation and Comparison of Nanocomposite Gate Insulator for Flexible Thin Film Transistor

  • Kim, Jin-Su;Jo, Seong-Won;Kim, Do-Il;Hwang, Byeong-Ung;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.278.1-278.1
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    • 2014
  • Organic materials have been explored as the gate dielectric layers in thin film transistors (TFTs) of backplane devices for flexible display because of their inherent mechanical flexibility. However, those materials possess some disadvantages like low dielectric constant and thermal resistance, which might lead to high power consumption and instability. On the other hand, inorganic gate dielectrics show high dielectric constant despite their brittle property. In order to maintain advantages of both materials, it is essential to develop the alternative materials. In this work, we manufactured nanocomposite gate dielectrics composed of organic material and inorganic nanoparticle and integrated them into organic TFTs. For synthesis of nanocomposite gate dielectrics, polyimide (PI) was explored as the organic materials due to its superior thermal stability. Candidate nanoprticles (NPs) of halfnium oxide, titanium oxide and aluminium oxide were considered. In order to realize NP concentration dependent electrical characteristics, furthermore, we have synthesized the different types of nanocomposite gate dielectrics with varying ratio of each inorganic NPs. To analyze gate dielectric properties like the capacitance, metal-Insulator-metal (MIM) structures were prepared together with organic TFTs. The output and transfer characteristics of organic TFTs were monitored by using the semiconductor parameter analyzer (HP4145B), and capacitance and leakage current of MIM structures were measured by the LCR meter (B1500, Agilent). Effects of mechanical cyclic bending of 200,000 times and thermally heating at $400^{\circ}C$ for 1 hour were investigated to analyze mechanical and thermal stability of nanocomposite gate dielectrics. The results will be discussed in detail.

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A Study on the Silicon Nitride for the poly-Si Thin film Transistor (다결정 박막 트랜지스터 적용을 위한 SiNx 박막 연구)

  • 김도영;김치형;고재경;이준신
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.12S
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    • pp.1175-1180
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    • 2003
  • Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

Molecular Aligning Properties of a Dielectric Layer of Polymer-Ceramic Nanocomposite for Organic Thin-Film Transistors

  • Kim, Chi-Hwan;Kim, Sung-Jin;Yu, Chang-Jae;Lee, Sin-Doo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1200-1203
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    • 2004
  • We investigated the molecular aligning capability of a polymer layer containing ceramic nanoparticles which can be used as a gate insulator of organic thin-film transistors (OTFTs). Because of the enhanced dielectric properties arising from the nanoparticles and molecular aligning properties of the polymer, the composite layer provides excellent mobility characteristics of the OTFTs.

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A STUDY ON THE ELECTRICAL CHARACTERISTICS OF ORGANIC THIN FILM TRANSISTORS WITH SURFACE-TREATED GATE DIELECTRIC LAYER (표면 처리한 $SiO_2$를 게이트 절연막으로 하는 박막 트랜지스터의 특성 연구)

  • Lee, Jae-Hyuk;Lee, Yong-Soo;Park, Jae-Hoon;Choi, Jong-Sun;Kim, Eu-Gene
    • Proceedings of the KIEE Conference
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    • 2000.11c
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    • pp.455-457
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    • 2000
  • In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

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Electrical Properties of PVP Gate Insulation Film on Polyethersulfone(PES) and Glass Substrates (Polyethersulfone(PES) 및 유리 기판위에 제작된 PVP 게이트 절연막의 전기적 특성)

  • Shin, Ik-Sup;Gong, Su-Cheol;Lim, Hun-Seoung;Park, Hyung-Ho;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.1
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    • pp.27-31
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    • 2007
  • The cpapcitors with MIM(metal-insulator-metal) structures using PVP gate insulation films were prepared for the application of flexible organic thin film transistors (OTFT). The co-polymer organic insulation films were synthesized by using PVP(poly-4-vinylphenol) as a solute and PGMEA(propylene glycol monomethyl ether acetate) as a solvent. The cross-linked PVP insulation films were also prepared by addition of poly(melamine-co-formaldehyde) as thermal hardener. The leakage current of the cross- linked PVP films was found to be about 1.3 nA on Al/PES(polyethersulfone) substrate, whereas, on ITO/ glass substrate was about 27.5 nA indicating improvement of the leakage current at Al/PES substrates. Also, the capacitances of all prepared samples on ITO/glass and Al/PES substrates w ere ranged from 1.0 to $1.2nF/cm^2$, showing very similar result with the calculated capacitance values.

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