• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.157-158
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• 2000

In this study, to get the larger drain current of the device under the same operation condition as the conventional gate dielectric SiNx thin film transistor devices, we introduced new gate dielectric $Ta_2O_5$ thin film which has high dielectric constant $({\sim}25)$ and good electrical reliabilities. For the application for the TFT device, we fabricated the $Ta_2O_5$ gate dielectric TFT on the low-temperature-transformed polycrystalline silicon thin film using the self-aligned implantation processing technology for source/drain and gate doping. The $Ta_2O_5$ gate dielectric TFT showed better electrical performance than SiNx gate dielectric TFT because of the higher dielectric constant.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.12
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• pp.1009-1013
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• 2009

In this study, we have been synthesized the dielectric layer using pure organic and organic-inorganic hybrid precursor on flexible substrate for improving of the organic thin film transistors (OTFTs) and, design and fabrication of organic thin-film transistors (OTFTs) using small-molecule organic semiconductors with pentacene as the active layer with record device performance. In this work OTFT test structures fabricated on polymerized substrates were utilized to provide a convenient substrate, gate contact, and gate insulator for the processing and characterization of organic materials and their transistors. By an adhesion development between gate metal and PI substrate, a PI film was treated using $O_2$ and $N_2$ gas. The best peel strength of PI film is 109.07 gf/mm. Also, we have studied the electric characteristics of pentacene field-effect transistors with the polymer gate-dielectrics such as cyclohexane and hybrid (cyclohexane+TEOS). The transistors with cyclohexane gate-dielectric has higher field-effect mobility, $\mu_{FET}=0.84\;cm^2/v_s$, and smaller threshold voltage, $V_T=-6.8\;V$, compared with the transistor with hybrid gate-dielectric.

• Transactions on Electrical and Electronic Materials
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• v.16 no.2
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• pp.95-98
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• 2015

Organic polymer dielectric thin films of styrene and vinyl acetate were prepared by the plasma polymerization deposition technique and applied for the fabrication of an organic thin film transistor device. The structural properties of the plasma polymerized thin films were characterized by Fourier-transform infrared spectroscopy, X-ray diffraction, atomic force microscopy, and contact angle measurement. Investigation of the electrical properties of the plasma polymerized thin films was carried out by capacitance-voltage and current-voltage measurements. The organic thin film transistor device with gate dielectric of the plasma polymerized thin film revealed a low operation voltage of −10V and a low threshold voltage of −3V. It was confirmed that plasma polymerized thin films of styrene and vinyl acetate could be applied to functional organic thin film transistor devices as the gate dielectric.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.276-276
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• 2014

High-performance, fully-transparent, and top-gated oxide thin-film transistor (TFT) was successfully fabricated with Ta2O5 high-k gate dielectric on a glass substrate. Through a self-passivation with the gate dielectric and top electrode, the top-gated oxide TFT was not affected from H2O and O2 causing the electrical instability. Heat-treated InSnO (ITO) was used as the top and source/drain electrode with a low resistance and a transparent property in visible region. A InGaZnO (IGZO) thin-film was used as a active channel with a broad optical bandgap of 3.72 eV and transparent property. In addition, using a X-ray diffraction, amorphous phase of IGZO thin-film was observed until it was heat-treated at 500 oC. The fabricated device was demonstrated that an applied electric field efficiently controlled electron transfer in the IGZO active channel using the Ta2O5 gate dielectric. With the transparent ITO electrodes and IGZO active channel, the fabricated oxide TFT on a glass substrate showed optical transparency and high carrier mobility. These results expected that the top-gated oxide TFT with the high-k gate dielectric accelerates the realization of presence of fully-transparent electronics.

• Journal of Information Display
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• v.7 no.3
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• pp.27-30
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• 2006

This paper presents a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_{2}O_{3}$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_{2}O_{3}$ as both a top gate dielectric and a passivation layer was investigated. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric was changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_{2}O_{3}$ as a top gate dielectric was changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode was changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure was successfully investigated by an analysis of electrostatic potential.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.543-545
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• 2009

With injection-type source delivery system of atomic layer deposition (ALD), bottom-contact and bottom-gate thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric for the first time. The properties of the ZnO TFT were greatly influenced by the device structure and the process conditions. The zinc oxide TFTs exhibited a channel mobility of 0.43 $cm^2$/Vs, a threshold voltage of 0.85 V, a subthreshold slope of 3.30 V/dec, and an on-to-off current ratio of above $10^6$ with solid saturation.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1103-1106
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• 2006

We have presented a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_2O_3$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_2O_3$ as both a top gate dielectric and a passivation layer is reported. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric is changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_2O_3$ as a top gate dielectric is changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode is changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure has been successfully understood by an analysis of electrostatic potential.

• Journal of the Korean Physical Society
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• v.81
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• pp.942-947
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• 2022

We report the electrical transport properties of a dual-gate graphene device placed on a CaF₂ substrate. A hexagonal boron nitride top-gate dielectric was introduced to confirm the electrical characteristics of the CaF₂/graphene transistor because it is difficult to inject sufficient carriers through the CaF₂ substrate owing to its thickness of 500 ㎛, and the typical ambipolar behavior of graphene with a slight n-doping effect was clearly observed. In addition, we used a polymethyl methacrylate (PMMA) film as a top-gate dielectric for large-scale graphene devices grown via chemical vapor deposition, which was transferred onto a CaF₂ substrate. We controlled the high gate leakage current caused by the breakdown of the polymer due to non-uniformity by applying the film-transfer process rather than the direct coating method on the graphene device. Furthermore, the transport properties of large-area graphene in contact with CaF₂ are discussed with respect to the effect of top-contacted PMMA.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1185-1188
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• 2006

Pentacene thin film transistors (OTFTs) on flexible polyimide substrate using electroplated gate electrode and organic/high-k inorganic bilayer gate dielectric layer. Incorporation of thin atomic-layer deposited $HfO_2$ layer on the PVP organic gate dielectric layer reduced the gate leakage and as a result enhanced the current on/off ratio.

• Korean Journal of Materials Research
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• v.3 no.6
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• pp.638-644
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• 1993

The degradation of dielectric breakdown field of 8nm-thick gate oxide ($SiO_2$) for Tipolycide MOS(meta1-oxide-semiconductor) capacitor with different annealing conditions and thickness of the polysilicon film on gate oxide was investigated. The degree of degradation in dielectric breakdown strength of the gate oxide for Ti-polycide gate became more severe with increasing annealing temperature and time, especially, for the case that thickness of the polysilicon film remained on the gate oxide after silicidation was reduced. The gate oxide degradation may be occurred by annealing although there is no direct contact of Ti-silicide with gate oxide. From SIMS analysis, it was confirmed that the degration of gate oxide during annealing was due to the diffusion of titanium atoms into the gate oxide film through polysilicon from the titanium silicide film.