• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2009년도 제40회 하계학술대회
• /
• pp.1597_1598
• /
• 2009

In this paper, the techniques and design focus of flexible gain coltrol of LAN(Low Noise Amplifier) using the TSMC 0.18um CMOS process. The design frequency set up a standard on 2.4GHz that is used in Zigbee system. The design concepts a basic Cascode LNA techniques and a swiching circuit consisted of 4 NMOS of load resistance, which convert the output impedenceby tuning on or off. The result show the gain change by NMOS operated swich. The simulation result is that Gain is 10.23~12.96dB and NF(Noise Figure) is 1.41~1.47dB.

• 한국통신학회논문지
• /
• 제26권12B호
• /
• pp.1695-1702
• /
• 2001

본 논문에서는 4 Mb/s 부터 100 Mb/s 의 IrDA(Infrared Data Association) 응용이 가능한 CMOS infrared (IR) wireless data link IC의 설계 방법에 대해 기술한다. 이 모듈은 60 dB에서 100 dB가지의 이득 범위를 가지는 variable gain transimpedance amplifier, AGC(automatic gain control) 회로, AOC(automatic offset control) loop, 4 PPM (pulse position modulation) modulator/demodulator와 DLL(delay locked loops)로 구성된다. 본 적외선 광송수신 IC는 0.25 um 1-poly 5-metal CMOS 공정을 이용하여 제작되었다. 2.5 V 전원 전압에서 동작시켰으며 100 Mb/s에서 출력단 버퍼를 제외하고 25 mW의 진력을 소모한다. 칩의 크기는 1.5 mm $\times$ 1 mm이다.

• 대한전자공학회논문지SD
• /
• 제44권7호통권361호
• /
• pp.54-61
• /
• 2007

병렬 피드백을 이용하여 이득을 조절할 수 있는 저잡음 증폭기가 설계되었다. 설계된 저잡음 증폭기는 0.18um CMOS 공정으로 설계되었으며, 병렬 피드백은 커플링 캐패시터와 이득 제어 트랜지스터로 구성되어있다. 제안된 이득 제어 방법은 병렬 피드백에 연결된 이득 제어 트랜지스터의 채널 저항을 이용하였다. 측정 결과 $12\;dB{\sim}26.5\;dB$까지 총 38.5 dB의 이득 제어 범위를 가지고 있으며, 측정된 잡음지수는 약 4 dB이다. 소비 전력은 약 13.5mW였다. 측정된 잡음 지수의 경우 시뮬레이션과는 다르게 일반적인 저잡음 증폭기보다 높게 나타났지만, 다른 유사한 기술에 비해 훨씬 큰 동작 범위를 가지는 저잡음 증폭기가 구현하였다.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
• /
• pp.732-735
• /
• 1997

Variable Structure Controller(VSC) is usually known to have robustness to bounded exogenous disturbances. The robustness is attributed to the discontinuous term in the control input. However, this discontinuous term also causes an undesirable effect called chattering. To alleviate chattering, a hybrid controller consisting of VSC and Fuzzy Logic Controller(FLC) is proposed, which belongs to the category of Fuzzy Sliding Mode Controller(FSMC). The role of FLC in FSMC is to replace a fixed gain of a discontinuous term with a time-varying one based on a specified rule base. The characteristics of proposed controller are shown to be similar to those of VSC with a saturation function instead of sign function. The only remarkable difference is the nonlinearity whose form can be adjusted by free parameters, normalize gain, denormalize gain, and membership functions. Applied to AC servo motor, the proposed controller is compared with VSC in a regulation problem as well as a speed tracking problem. The simulation results show a substantial chatter reduction.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
• /
• pp.983-986
• /
• 2003

This paper describes a 2.5V 80dB 360MHz CMOS VGA. A new variable degeneration resistor is proposed where the dc voltage drop over the degeneration resistor is minimized and employed in designing a low-voltage and high-speed CMOS VGA. HSPICE simulation results using a 0.25${\mu}{\textrm}{m}$ CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than 1.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190${\mu}{\textrm}{m}$$\times$360${\mu}{\textrm}{m}$.

• 전기학회논문지
• /
• 제57권7호
• /
• pp.1195-1199
• /
• 2008

In this paper, peak detector of generator's output voltage and variable gain controller are introduced for a fast dynamic response. The conventional r,m.s, signal detected has inherent time delay, and the dynamic response of generator using conventional PID controller has some problem in sudden load change. In this paper, the peak detector and signal selector with variable gain controller is used to overcome this problem. The main controller can check the voltage state from the peak detector. When a sudden load change, the over-voltage and under-voltage signal from peak detector change the controller's gain and exciter's current reference. The proposed scheme can improve the dynamic response, which is verified from experimental test of 200kW diesel engine-generator.

• 전력전자학회논문지
• /
• 제23권2호
• /
• pp.121-128
• /
• 2018

This work proposes a simple control method of a buck-type active power decoupling circuit that can minimize the ripple values in the dc link voltage. The proposed method utilizes a simplified duty calculation method and an optimal compensation gain tracking algorithm with variable-step approach. Thus, the dc link voltage ripple can be effectively reduced through the proposed method along with rapid response in tracking the optimum compensation gain. Moreover, the proposed method has better dynamic responses in the load fluctuation or abnormal situation. MATLAB/Simulink simulation and hardware-in-the-loop-simulation(HILS)-based experimental results are presented to validate the effectiveness of the proposed control method.

• ETRI Journal
• /
• 제26권5호
• /
• pp.486-492
• /
• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제10권4호
• /
• pp.282-291
• /
• 2010

This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 ${\mu}m$ CMOS technology and the die area is 5 mm $\times$ 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.

• 제어로봇시스템학회논문지
• /
• 제7권8호
• /
• pp.680-688
• /
• 2001

In this paper, the fuzzy control with variable input gain is applied to maintain the consistent tension in the process of taking up and releasing texture. In the process of discharging web on one side rolling it on another, the take-up drum gets smaller on the release drum side as it gets bigger on the rolling side, thus it is necessary to change the balance of velocity between the sides. In order to solve the problem a tension controller is necessary. The PI control method has been employed to maintain the consistent tension, but the PI control method produces a problem which requires an experienced worker with the traits of the machine, in order to perform the fine adjustments according to the environment of the process. For solving the above problem, we apply fuzzy control to the tension system, in order to produce a uniform roll. For the performance test, the fuzzy controller does not need to revise the parameters. Therefore the fuzzy controller exhibits an excellent additivity for the tension system where the system is changed with time.