• Title/Summary/Keyword: Gain Margin

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Use of Leucaena leucocephala and Gliricidia sepium as Nitrogen Sources in Supplementary Concentrates for Dairy Goats Offered Rhodes Grass Hay

  • Ondiek, J.O.;Tuitoek, J.K.;Abdulrazak, S.A.;Bareeba, F.B.;Fujihara, T.
    • Asian-Australasian Journal of Animal Sciences
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    • v.13 no.9
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    • pp.1249-1254
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    • 2000
  • A study was conducted to evaluate the replacement value of Leucaena leucocephala and Gliricidia sepium as nitrogen sources in commercial type supplements for dairy goats. Six crossbred $(Toggenburg{\times}Saanen)$ goats at late stage of lactation were allocated to three dietary treatments in a double $3{\times}3$ Latin square design. The animals were offered rhodes grass (Chloris gayana) hay ad libitum and supplemented with either Leucaena-based concentrate (LBC), Gliricidia-based concentrate (GBC) or commercial based concentrate (CC). Voluntary food intake, milk yield and composition and changes in live weight were measured. The total dry matter (DM) intake was higher (p<0.05) in goats fed GBC than CC (1385 vs 1331 g/d). The DM intake for LBC (1343 g/d) was similar to CC (1331 g/d). The DM intake of hay was also higher (p<0.05) in goats fed GBC (834 g/d) than those receiving LBC or CC (789, 782 g/d, respectively). Animals supplemented with GBC recorded positive (11 g/d) weight gain while the other groups lost weight (13, 19 g/d) for LBC and CC respectively, although these differences were not statistically significant (p>0.05). The composition of milk were: butterfat 58, 49 and 55 g/kg; crude protein 37.0, 35.4 and 36.1 g/kg; lactose 33, 29 and 30 g/kg; Ash 8.5, 8.5 and 7.9 g/kg and total solids 136.5, 121.9 and 129.0 g/kg, for goats fed LBC, GBC and CC respectively. There were no differences in the composition of milk due to these dietary treatments. At the end of performance trial, a digestibility trial was conducted using 6 female goats allocated to the three treatments (LBC, GBC and CC) in an incomplete randomized block design and each goat received a different supplement in each of two successive periods. There were no differences in nutrient digestibility except for DM, which was higher (p<0.05) in CC compared to the other treatments (615, 622, 720 g/kg for LBC, GBC and CC, respectively). Economic analysis showed that CC diet was more expensive (0.20 US$/kg) and had a lower margin over supplementation (0.11 US$) compared to LBC and GBC (0.13 vs 0.12 US$/kg and 01.5 vs 0.12 US$, respectively). It is concluded that the Leucaena and Gliricidia could contribute as nitrogen sources in compounded diet supplements without any detrimental effects on production in dairy goats.

A Study on A Mathematical Formulation of Protection Ratio and Its Calculation for Fixed Radio Relay System with Diversity (다이버시티를 갖는 고정 무선 중계 시스템에 대한 보호비의 수학적 표현과 계산에 대한 연구)

  • Suh Kyoung-Whoan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.4 s.107
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    • pp.358-367
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    • 2006
  • In this paper, a mathematical formulation of protection ratio and its calculation method are suggested for a radio relay system with diversity techniques. The analysis of protection ratio and its physical meaning have been performed for the space or frequency diversity system, and in particular protection ratios are reviewed in terms of the parameters of diversity improvement factor, which comprises antenna gain, separation distance between antennas, frequency and its difference between carriers, and distance. As one of simulated results, the co-channel protection ratio of 60 dB is obtained for the space diversity system regarding 6.2 GHz, 60 km, 64-QAM, and 25 m between antennas, which gives 15 dB less than the co-channel protection ratio of the non-space diversity system. In addition, the co-channel protection ratio for the frequency diversity system gives 64 dB in case of frequency offset of 0.5 GHz under the same conditions as the space diversity system, which brings about 11 dB less than the co-channel protection ratio of non-frequency diversity system. In consequency, it is interesting to note that the space diversity system is less sensitive to interference in comparison to the frequency diversity system and provides better quality of service for a given interference.

A 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for High-Quality Video Systems (고화질 영상 시스템 응용을 위한 12비트 130MS/s 108mW $1.8mm^2$ 0.18um CMOS A/D 변환기)

  • Han, Jae-Yeol;Kim, Young-Ju;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.77-85
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    • 2008
  • This work proposes a 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for high-quality video systems such as TFT-LCD displays and digital TVs requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC optimizes power consumption and chip area at the target resolution and sampling rate based on a three-step pipeline architecture. The input SHA with gate-bootstrapped sampling switches and a properly controlled trans-conductance ratio of two amplifier stages achieves a high gain and phase margin for 12b input accuracy at the Nyquist frequency. A signal-insensitive 3D-fully symmetric layout reduces a capacitor and device mismatch of two MDACs. The proposed supply- and temperature- insensitive current and voltage references are implemented on chip with a small number of transistors. The prototype ADC in a 0.18um 1P6M CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 2.12LSB, respectively. The ADC shows a maximum SNDR of 53dB and 51dB and a maximum SFDR of 68dB and 66dB at 120MS/s and 130MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 108mW at 130MS/s and 1.8V.

An Esthetic Restoration of the Missing Maxillary Anterior Teeth with the Rotational Path RPD: A Case Report (회전삽입로 국소의치를 이용한 심미적 상악 전치부 수복 증례)

  • Lee, Ji-Hye;Lim, So-Min;Jung, Hye-Eun;Park, Chan-Jin;Cho, Lee-Ra;Kim, Dae-Gon
    • Journal of Dental Rehabilitation and Applied Science
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    • v.27 no.2
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    • pp.209-222
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    • 2011
  • Missing anterior teeth can be replaced using any of a number of methods. Patients may choose to replace missing teeth with a prosthesis that is either removable, fixed, or retained with implants. For patients faced with financial, anatomical, and/or esthetic limitations, the edentulous region can be restored successfully and esthetically with a properly designed and fabricated rotational path RPD. The rotational path RPD is a partial removable dental prosthesis that incorporates a curved, arcuate, or variable path of placement allowing one or more of the rigid components of the framework to gain access to and engage an undercut area. The rigid retainer must gain access to the infrabulge portion of the tooth by rotating into place. Either a minor connector or proximal plate provides retention through its intimate contact with a proximal tooth surface. A specially designed dovetails or asymmetric rest seats provides support and embracing effects. Correctly designed and fabricated rotational path RPD can provide improved esthetics, cleanliness, and retention. But rotational path RPDs are technique sensitive since the rotational path RPD has little margin of laboratory error that rigid retainers cannot be adjusted like conventional clasps can, RPD framework must be remade once the retention is lost. The sufficient understanding of the concept for the rotational path RPD is required for clinically successful treatment. This clinical report describes in detail the theoretical, laboratory considerations and the treatment of a patient with an anterior maxillary edentulous area treated by an AP path rotational RPD that had a difficulty in long term maintenance and describes another clinical case in which more reasonable treatment procedures were approached after analyzing the former case.

A 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS ADC Based on High-Accuracy Integrated Capacitors (높은 정확도를 가진 집적 커페시터 기반의 10비트 250MS/s $1.8mm^2$ 85mW 0.13un CMOS A/D 변환기)

  • Sa, Doo-Hwan;Choi, Hee-Cheol;Kim, Young-Lok;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.11 s.353
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    • pp.58-68
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    • 2006
  • This work proposes a 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS A/D Converter (ADC) for high-performance integrated systems such as next-generation DTV and WLAN simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The input SHA maintains 10b resolution with either gate-bootstrapped sampling switches or nominal CMOS sampling switches. The SHA and two MDACs based on a conventional 2-stage amplifier employ optimized trans-conductance ratios of two amplifier stages to achieve the required DC gain, bandwidth, and phase margin. The proposed signal insensitive 3-D fully symmetric capacitor layout reduces the device mismatch of two MDACs. The low-noise on-chip current and voltage references can choose optional off-chip voltage references. The prototype ADC is implemented in a 0.13um 1P8M CMOS process. The measured DNL and INL are within 0.24LSB and 0.35LSB while the ADC shows a maximum SNDR of 54dB and 48dB and a maximum SFDR of 67dB and 61dB at 200MS/s and 250MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 85mW at 250MS/s at a 1.2V supply.

A 12b 200KHz 0.52mA $0.47mm^2$ Algorithmic A/D Converter for MEMS Applications (마이크로 전자 기계 시스템 응용을 위한 12비트 200KHz 0.52mA $0.47mm^2$ 알고리즈믹 A/D 변환기)

  • Kim, Young-Ju;Chae, Hee-Sung;Koo, Yong-Seo;Lim, Shin-Il;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.11 s.353
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    • pp.48-57
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    • 2006
  • This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.