• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2001.04a
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• pp.413-417
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• 2001

High speed linear motor feed system has been simulated using neural network technique. Due to the limited resources, control gain tuning has been the most troublesome part in controller design. Regardless of the system structure, conventional control gain could be adjusted minimizing the resulting error using the proposed method. Slight performance deterioration was observed at the small value of training epoch.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.70-74
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• 1998

In this paper, by means of Lyapunov second method, we analyze the stability of IP control servo systems in the time domain for the first time. Based on the results on the stability analysis, the design rule to select the gain of IP control is suggested such that the maximum error of output to the nominal system is guaranteed for all uncertainty and load variations. An example of a speed control of brushless dc motor given to prove the unusefulness of the gain design rule.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2082-2084
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• 2003

A practical real-time LOS rate estimator is proposed to handle the time-varying measurement noise statistics. To calculate the optimal Kalman gain, the algebraic transformation method is taken into account. By using the algebraic transformation, the differential algebraic Riccati equation(DARE) regarding estimation error covariance is replaced by the simple algebraic Riccati equation(ARE). The proposed LOS estimation filter gain is only a function of relative range. Consequently, the proposed method is computationally very efficient and suitable for embedded environment.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.48.5-48
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• 2001

The resulting stabilizing controller in this paper consists of the disturbance estimator and the gain scheduled controller. The disturbance estimator tracks the unknown external disturbance and its derivative information in the closed-loop control system using fuzzy logic based adaptation law. Moreover, the gains of the stabilizing controller are appropriately scheduled according to the estimated values. Furthermore, since the estimation law is combined with the stabilizing controller in the closed control loop, it asymptotically minimizes the estimation error. In order to conrm the usefulness of the proposed control scheme, it is applied to the magnetic suspension systems.

• Journal of information and communication convergence engineering
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• v.10 no.1
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• pp.85-90
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• 2012

A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.9
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• pp.947-956
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• 2008

In this paper, miniaturized conically stepped COBRA is proposed. In order to prevent electrical breakdown, COBRA, which consists of hem and lens, has to get bigger if it is designed with conventional method. Because of the phase error increase, shortening the length of the antenna without changing the aperture size leads to the reduction of the antenna gain. To avoid this, the phase error at the aperture is compensated by transforming the COBRA lens into conically stepped form. The simulations result shows that the proposed antenna has higher gain than the conventional COBRA in spite of the size reduction from 1,300 mm to 600 mm. The fabricated and measured COBRA has the gain of 26.2 dBi.

• Journal of the Korea Society of Computer and Information
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• v.15 no.5
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• pp.13-21
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• 2010

The Optimal results of Kalman Filtering on the Inverted Pendulum System requires an effective factor such as the noise covariance matrix Q, the measurement noise covariance matrix R and the initial error covariance matrix $P_0$. We present a special case where the optimality of the filter is not destroyed and not sensitive to scaling of these covariance matrix because these factors are unknown or are known only approximately in the practical situation. Moreover, the error covariance matrices issued by this method predict errors in the state estimate consistent with the scaled covariance matrices and not the issued state estimates. Various results using the scalar gain $\delta$ are derived to described the relations among the three covariance matrices, Kalman Gain and the error covariance matrices. This paper is described as follows: Section III a brief overview of the Inverted Pendulum system. Section IV deals with the mathematical dynamic model of the system used for the computer simulation. Section V presents a various simulation results using the scalar gain.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.645-655
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• 1990

A hybrid DS/SFH spread spectrum system is used to achieve a larger gain in some applications. The probability of error for a hybrid DS/SFH(direct sequence/slow frequency hopped) spread-spectrum system is calculated over a channel which suffers from multiple-tone jamming and additive white Gaussian noise. BPSK(binary phase shift keying) is considered as modulation scheme. The probability of error is computed for various system parameters such as a DS/SFH hybrid ratio, the number of jamming tones, a jamming-to-signal ratio, and a siganl-to-noise ratio. It is shown that a DS system or a SFH system achieves smaller probability of error than a hybrid DS/SFH system for most values of system parameters. However, it is also shown that there are hybrid ratios with which a hybrid DS/SFH system achieves smaller probability of error than a DS system and a SFH system achieve for some values of system parameters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12A
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• pp.991-997
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• 2009

Transmit beamforming is simple method to achieve the full diversity gain that is available in multiple antenna(MIMO) wireless systems. Unfortunately, the prior condition to achieve this gain requires perfect channel knowledge at both transmitter and receiver, which is impractical on account of limited feedback link. Therefore, for the practical system, codebook based feedback scheme is often employed, where the beamforming vector is selected from the codebook to maximize the output signal-to-noise ratio (SNR) at receiver, and the receiver only sends back the index of the best beamforming vector to the transmitter. In this paper we derive analytical expression of average bit error rate (BER) for the codebook based transmit beamforming MISO system over the feedback error channel. Using this analytical result, we present optimum codebook indexing scheme to improve the performance of this system. From some selected numerical examples we show that our proposed codebook indexing scheme can provide nonnegligible performance improvements in terms of average BER over the severe feedback error channel.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.140-148
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• 2013

This paper presents a iterative Bose-Chaudhuri-hocquenghem (i-BCH) code and its high-speed decoder architecture for 100 Gb/s optical communications. The proposed architecture features a very high data processing rate as well as excellent error correction capability. The proposed 6-iteration i-BCH code structure with interleaving method allows the decoder to achieve 9.34 dB net coding gain performance at $10^{-15}$ decoder output bit error rate to compensate for serious transmission quality degradation. The proposed high-speed i-BCH decoder architecture is synthesized using a 90-nm CMOS technology. It can operate at a clock frequency of 430 MHz and achieve a data processing rate of 100 Gb/s. Thus, it has potential applications in next generation forward error correction (FEC) schemes for 100 Gb/s optical communications.