• Title/Summary/Keyword: GaN surface

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VHF (162 MHz) multi-tile push-pull 플라즈마 소스를 이용한 반도체소자의 질화 공정

  • Ji, Yu-Jin;Kim, Gi-Seok;Kim, Gi-Hyeon;Yeom, Geun-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2017.05a
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    • pp.134.2-134.2
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    • 2017
  • 최근 고성능, 저 전력 반도체 소자를 위한 미세 공정 기술이 발전함에 따라, gate oxide의 두께 및 선폭이 감소하고, aspect ratio가 증가하고 있는 추세이다. 따라서 얇아진 gate oxide를 통한 채널 물질로의 boron 확산을 막기 위한 고농도 질화 막 증착의 필요성이 높아지고 있으며, high aspect ratio의 gate oxide에 적용 가능한 우수한 step coverage의 질화막 또한 요구되고 있다. 이러한 요구조건을 만족시키기 위해 일반적인 13.56MHz의 플라즈마 소스를 이용한 질화연구들이 선행되어져 왔으나, 높은 binding energy(~24 eV)를 가지고 있는 N2 molecule gas를 효과적으로 dissociation 하지 못해 충분한 질화공정이 수행되어질 수 없었을 뿐만 아니라 높은 공정온도($>200^{\circ}C$에서 진행되어 반도체소자에 손상을 줄 수 있다. 본 연구에서는 이러한 문제들을 해결하기 위해 VHF (162MHz)를 이용한 플라즈마를 통해 고밀도에서 낮은 전자온도와 높은 진동온도의 플라즈마를 구현하여 20%이상의 높은 질화율을 얻을 수 있었고, multi-tile push-pull 플라즈마 소스를 통해 VHF 사용 시 나타나는 standing wave effect를 제어하여 high aspect ratio의 gate sidewall spacer에 우수한 step coverage의 질화막을 형성시킬 수 있었다.

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Fabrication of Anodic Aluminum Oxide on Si and Sapphire Substrate (실리콘 및 사파이어 기판을 이용한 알루미늄의 양극산화 공정에 관한 연구)

  • Kim Munja;Lee Jin-Seung;Yoo Ji-Beom
    • Korean Journal of Materials Research
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    • v.14 no.2
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    • pp.133-140
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    • 2004
  • We carried out anodic aluminum oxide (AAO) on a Si and a sapphire substrate. For anodic oxidation of Al two types of specimens prepared were Al(0.5 $\mu\textrm{m}$)!Si and Al(0.5 $\mu\textrm{m}$)/Ti(0.1 $\mu\textrm{m}$)$SiO_2$(0.1 $\mu\textrm{m}$)/GaN(2 $\mu\textrm{m}$)/Sapphire. Surface morphology of Al film was analyzed depending on the deposition methods such as sputtering, thermal evaporation, and electron beam evaporation. Without conventional electron lithography, we obtained ordered nano-pattern of porous alumina by in- situ process. Electropolishing of Al layer was carried out to improve the surface morphology and evaluated. Two step anodizing was adopted for ordered regular array of AAO formation. The applied electric voltage was 40 V and oxalic acid was used as an electrolyte. The reference electrode was graphite. Through the optimization of process parameters such as electrolyte concentration, temperature, and process time, a regular array of AAO was formed on Si and sapphire substrate. In case of Si substrate the diameter of pore and distance between pores was 50 and 100 nm, respectively. In case of sapphire substrate, the diameter of pore and distance between pores was 40 and 80 nm, respectively

Decolorization of Acid Green 25 by Surface Display of CotA laccase on Bacillus subtilis Spores

  • Park, Jong-Hwa;Kim, Wooil;Lee, Yong-Suk;Kim, June-Hyung
    • Journal of Microbiology and Biotechnology
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    • v.29 no.9
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    • pp.1383-1390
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    • 2019
  • In this study, we expressed cotA laccase from Bacillus subtilis on the surface of B. subtilis spores for efficient decolorization of synthetic dyes. The cotE, cotG, and cotY genes were used as anchoring motifs for efficient spore surface display of cotA laccase. Moreover, a $His_6$ tag was inserted at the C-terminal end of cotA for the immunological detection of the expressed fusion protein. Appropriate expression of the CotE-CotA (74 kDa), CotG-CotA (76 kDa), and CotY-CotA (73 kDa) fusion proteins was confirmed by western blot. We verified the surface expression of each fusion protein on B. subtilis spore by flow cytometry. The decoloration rates of Acid Green 25 (anthraquinone dye) for the recombinant DB104 (pSDJH-EA), DB104 (pSDJH-GA), DB104 (pSDJH-YA), and the control DB104 spores were 48.75%, 16.12%, 21.10%, and 9.96%, respectively. DB104 (pSDJH-EA) showed the highest decolorization of Acid Green 25 and was subsequently tested on other synthetic dyes with different structures. The decolorization rates of the DB104 (pSDJH-EA) spore for Acid Red 18 (azo dye) and indigo carmine (indigo dye) were 18.58% and 43.20%, respectively. The optimum temperature for the decolorization of Acid Green 25 by the DB104 (pSDJH-EA) spore was found to be $50^{\circ}C$. Upon treatment with known laccase inhibitors, including EDTA, SDS, and $NaN_3$, the decolorization rate of Acid Green 25 by the DB104 (pSDJH-EA) spore decreased by 23%, 80%, and 36%, respectively.

Effect of Alloy Elements on Galvannealed Coating Quality in IF High Strength Steels (IF 고강도 합금화 용융아연도금강판의 표면품질에 미치는 합금원소의 영향)

  • Jeon, Sun-Ho;Chin, Kwang-Geun;Shin, Kwang-Soo;Sohn, Ho-Sang;Kim, Dai-Ryong
    • Korean Journal of Metals and Materials
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    • v.46 no.5
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    • pp.289-295
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    • 2008
  • The effect of the alloy elements(Si/Mn) ratio on the coating quality including wettabilty with molten zinc, galvannealing kinetics and crater has been investigated in interstitial-free high strength steel(IFHSS) containing Si and Mn. When the Si/Mn ratio was below 0.75, IF-HSS exhibited a good wettability leading to a good galvannealed coating quality after annealing at $800^{\circ}C$ for 40s in $15%H_2-N_2$ mixed gas with dew point $-60^{\circ}C$. In contrast, the wettability and galvannealed coating quality were deteriorated in the Si/ Mn ratio above 0.75. It is shown that they have relevance to oxides forms by selective oxidation on the steel surface. The oxide particles dispersed on the steel surface with a surface coverage of below 40% resulted in good wettability and galvannealed coating quality. The oxide particle is mainly consisted of $Mn_2SiO_4$ with low contact angle in molten zinc. On the other hand, the continuous oxide layer on the steel surface, such as network- and film-type,caused to poor wettability and galvannealed coating quality. The coverage of oxide layer was above 80%, and its chemical species was $SiO_2$ with high contact angle in molten zinc. Consequently, the Si/Mn alloy ratio played an importance role in galvannealed coating quality of IF-HSS.

The Preparation of Activated Carbon from Coffee Waste: ZnCl2-Activation (커피폐기물을 이용한 활성탄의 제조: ZnCl2-활성화)

  • You, S.H.;Kim, H.H.
    • Applied Chemistry for Engineering
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    • v.9 no.4
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    • pp.509-515
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    • 1998
  • Activated coffee chars were prepared from coffee waste by chemical activation with zinc chloride. In this study, the following processes were carried out ; roasting step, carbonization step, chemical activation step, and washing and drying step. The roasting step of coffee waste was carried out at $300{\sim}400^{\circ}C$ for 10 minutes. The optimum condition of carbonization was at $650^{\circ}C$ for 1 hour. The most important parameter in chemical activation of coffee char was found to be the chemical ratio of activation agents. Activated coffee chars prepared by various activation methods were characterized in terms of the nitrogen BET surface area, the BJH pore volume and pore size distribution at 77 K. The $N_2$-BET surface areas and total pore volume of coffee chars prepared by the chemical activation with $ZnCl_2$ were determined as about $1110{\sim}1580m^2/g$ and $0.51{\sim}0.81cm^3/g$, respectively. Scanning Electron Microscopy (SEM) was used to observe the porosity and surface of activated coffee chars. From the results of SEM analysis, it was shown that active surface and many pores were formed after the chemical activation. The preparation of the activated coffee char from coffee waste was successfully carried out, which previews a possibility for exploitation of resources by recycling the waste.

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Optical Properties of Vertical Cavity Laser - Depleted Optical Thyristor for Low Threshold Current (낮은 문턱 전류를 위한 Vertical Cavity Laser - Depleted Optical Thyristor 의 레이징 특성에 관한 연구)

  • Choi Woon-Kyung;Choi Young-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.7 s.349
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    • pp.1-6
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    • 2006
  • We show for the first time the optical properties of the selectively oxidized vertical cavity laser (VCL) - depleted optical thyristor (DOT), which has not only a low threshold current, but also a high sensitivity to the optical input light. In order to analyze their switching characteristics, nonlinear s-shaped current-voltage characteristics are calculated and the reverse full-depletion voltages (Vneg's) are obtained as function of semiconductor parameters by using a finite difference method (FDM). The selectively oxidized PnpN VCL-DOT clearly shows the nonlinear s-shaped current-voltage and lasing characteristics. A switching voltage of 5.24 V, a holding voltage of 1.50 V, a spectral response at 854.5 nm, and a very low threshold current of 0.65 mA is measured, making these devices attractive for optical processing applications.

Effect of Multiple Reflows on the Mechanical Reliability of Solder Joint in LED Package (LED 패키지 솔더 접합부의 기계적 신뢰성에 미치는 리플로우 횟수의 영향)

  • Lee, Young-Chul;Kim, Kwang-Seok;Ahn, Ji-Hyuk;Yoon, Jeong-Won;Ko, Min-Kwan;Jung, Seung-Boo
    • Korean Journal of Metals and Materials
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    • v.48 no.11
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    • pp.1035-1040
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    • 2010
  • The research efforts on GaN-based light-emitting diodes (LEDs) keep increasing due to their significant impact on the illumination industry. Surface mount technology (SMT) is widely used to mount the LED packages for practical application. In surface mount soldering both the device body and leads are intentionally heated by a reflow process. We studied on the effects of multiple reflows on microstructural variation and joint strength of the solder joints between the LED package and the substrate. In this study, Pb-free Sn-3.0Ag-0.5Cu solder and a finished pad with organic solderability preservatives (OSP) were employed. A $Cu_6Sn_5$ intermetallic compound (IMC) layer was formed during the multiple reflows, and the thickness of the IMC layerincreased with an increasing number of reflows. The shear force decreased after three reflows. From the observation of the fracture surface after a shear test, partially brittle fractures were observed after five reflows.

Chemical Mechanical Polishing: A Selective Review of R&D Trends in Abrasive Particle Behaviors and Wafer Materials (화학기계적 연마기술 연구개발 동향: 입자 거동과 기판소재를 중심으로)

  • Lee, Hyunseop;Sung, In-Ha
    • Tribology and Lubricants
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    • v.35 no.5
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    • pp.274-285
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    • 2019
  • Chemical mechanical polishing (CMP), which is a material removal process involving chemical surface reactions and mechanical abrasive action, is an essential manufacturing process for obtaining high-quality semiconductor surfaces with ultrahigh precision features. Recent rapid growth in the industries of digital devices and semiconductors has accelerated the demands for processing of various substrate and film materials. In addition, to solve many issues and challenges related to high integration such as micro-defects, non-uniformity, and post-process cleaning, it has become increasingly necessary to approach and understand the processing mechanisms for various substrate materials and abrasive particle behaviors from a tribological point of view. Based on these backgrounds, we review recent CMP R&D trends in this study. We examine experimental and analytical studies with a focus on substrate materials and abrasive particles. For the reduction of micro-scratch generation, understanding the correlation between friction and the generation mechanism by abrasive particle behaviors is critical. Furthermore, the contact stiffness at the wafer-particle (slurry)-pad interface should be carefully considered. Regarding substrate materials, recent research trends and technologies have been introduced that focus on sapphire (${\alpha}$-alumina, $Al_2O_3$), silicon carbide (SiC), and gallium nitride (GaN), which are used for organic light emitting devices. High-speed processing technology that does not generate surface defects should be developed for low-cost production of various substrates. For this purpose, effective methods for reducing and removing surface residues and deformed layers should be explored through tribological approaches. Finally, we present future challenges and issues related to the CMP process from a tribological perspective.

Microstructural Characteristics of III-Nitride Layers Grown on Si(110) Substrate by Molecular Beam Epitaxy

  • Kim, Young Heon;Ahn, Sang Jung;Noh, Young-Kyun;Oh, Jae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.327.1-327.1
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    • 2014
  • Nitrides-on-silicon structures are considered to be an excellent candidate for unique design architectures and creating devices for high-power applications. Therefore, a lot of effort has been concentrating on growing high-quality III-nitrides on Si substrates, mostly Si(111) and Si(001) substrates. However, there are several fundamental problems in the growth of nitride compound semiconductors on silicon. First, the large difference in lattice constants and thermal expansion coefficients will lead to misfit dislocation and stress in the epitaxial films. Second, the growth of polar compounds on a non-polar substrate can lead to antiphase domains or other defective structures. Even though the lattice mismatches are reached to 16.9 % to GaN and 19 % to AlN and a number of dislocations are originated, Si(111) has been selected as the substrate for the epitaxial growth of nitrides because it is always favored due to its three-fold symmetry at the surface, which gives a good rotational matching for the six-fold symmetry of the wurtzite structure of nitrides. Also, Si(001) has been used for the growth of nitrides due to a possible integration of nitride devices with silicon technology despite a four-fold symmetry and a surface reconstruction. Moreover, Si(110), one of surface orientations used in the silicon technology, begins to attract attention as a substrate for the epitaxial growth of nitrides due to an interesting interface structure. In this system, the close lattice match along the [-1100]AlN/[001]Si direction promotes the faster growth along a particular crystal orientation. However, there are insufficient until now on the studies for the growth of nitride compound semiconductors on Si(110) substrate from a microstructural point of view. In this work, the microstructural properties of nitride thin layers grown on Si(110) have been characterized using various TEM techniques. The main purpose of this study was to understand the atomic structure and the strain behavior of III-nitrides grown on Si(110) substrate by molecular beam epitaxy (MBE). Insight gained at the microscopic level regarding how thin layer grows at the interface is essential for the growth of high quality thin films for various applications.

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A study on copper thin film growth by chemical vapor deposition onto silicon substrates (실리콘 기판 위에 화학적 방법으로 증착된 구리 박막의 특성 연구)

  • 조남인;박동일;김창교;김용석
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.6 no.3
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    • pp.318-326
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    • 1996
  • This study is to investigate a chemical vapor deposition technique of copper film which is expected to be more useful as metallizations of microcircuit fabrication. An experimental equipment was designed and set-up for this study, and a Cu-precursor used that is a metal-organic compound, named (hfac)Cu(I)VTMS ; (hevaflouoroacetylacetonate trimethyvinylsilane copper). Base pressure of the experimental system is in $10^{-6}$ Torr, and the chamber pressure and the substrate temperature can be controlled in the system. Before the deposition of copper thin film, tungsten or titanium nitride film was deposited onto the silicon wafer. Helium has been used as carrier gas to control the deposition rate. As a result, deposition rate was measured as $1,800\;{\AA}/min$ at $220^{\circ}C$ which is higher than the results of previous studies, and the average surface roughness was measured as about $200\;{\AA}$. A deposition selectivity was observed between W or TiN and $SiO_{2}$ substrates below $250^{\circ}C$, and optimum results are observed at $180^{\circ}C$ of substrate temperature and 0.8 Torr of chamber pressure.

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